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/linux/drivers/phy/broadcom/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_BCM63XX_USBH) += phy-bcm63xx-usbh.o
3 obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
4 obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
5 obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o
6 obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o
7 obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
8 obj-$(CONFIG_PHY_NS2_USB_DRD) += phy-bcm-ns2-usbdrd.o
9 obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
10 obj-$(CONFIG_PHY_BRCM_USB) += phy-brcm-usb-dvr.o
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
H A Dsnps,dwc3-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
H A Dstm32h743i-eval.dts2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32h7-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-EVAL board";
49 compatible = "st,stm32h743i-eval", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
65 vdda: regulator-vdda {
66 compatible = "regulator-fixed";
67 regulator-name = "vdda";
[all …]
H A Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp135f-dhcor-dhsbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG
7 * DHCOR PCB number: 718-100 or newer
8 * DHSBC PCB number: 719-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
16 #include "stm32mp13xx-dhcor-som.dtsi"
20 compatible = "dh,stm32mp135f-dhcor-dhsbc",
21 "dh,stm32mp135f-dhcor-som",
32 stdout-path = "serial0:115200n8";
[all …]
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
H A Dstm32mp157a-stinger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
24 stdout-path = "serial1:115200n8";
33 compatible = "gpio-leds";
38 linux,default-trigger = "heartbeat";
39 default-state = "off";
[all …]
H A Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
[all …]
H A Dstm32f746-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
51 model = "STMicroelectronics STM32F746-DISCO board";
52 compatible = "st,stm32f746-disco", "st,stm32f746";
56 stdout-path = "serial0:115200n8";
[all …]
H A Dstm32746g-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "STMicroelectronics STM32746g-EVAL board";
51 compatible = "st,stm32746g-eval", "st,stm32f746";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-tao3530.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
26 cpu0-supply = <&vcc>;
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
42 startup-delay-us = <70000>;
45 /* HS USB Host PHY on PORT 2 */
[all …]
H A Domap3-beagle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
15 cpu0-supply = <&vcc>;
30 compatible = "gpio-leds";
31 led-pmu-stat {
36 led-heartbeat {
38 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
39 linux,default-trigger = "heartbeat";
[all …]
H A Domap3-lilly-a83x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 model = "INCOstartec LILLY-A83X module (DM3730)";
10 compatible = "incostartec,omap3-lilly-a83x", "ti,omap3630", "ti,omap36xx", "ti,omap3";
22 compatible = "gpio-leds";
25 label = "lilly-a83x::led1";
27 linux,default-trigger = "default-on";
33 compatible = "ti,omap-twl4030";
34 ti,model = "lilly-a83x";
40 compatible = "regulator-fixed";
41 regulator-name = "VCC3";
[all …]
/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
13 usb2 = &usbh;
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
26 compatible = "arm,cortex-a7";
29 clock-frequency = <996000000>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
21 opp-600000000 {
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/r9a07g043-cpg.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
15 audio_clk1: audio1-clk {
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
19 clock-frequency = <0>;
22 audio_clk2: audio2-clk {
23 compatible = "fixed-clock";
[all …]

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