/linux/Documentation/devicetree/bindings/thermal/ |
H A D | brcm,ns-thermal.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom Northstar Thermal 10 - Rafał Miłecki <rafal@milecki.pl> 13 Thermal sensor that is part of Northstar's DMU (Device Management Unit). 16 - $ref: thermal-sensor.yaml# 20 const: brcm,ns-thermal 26 "#thermal-sensor-cells": [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/pads-imx8qm.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
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/linux/arch/arm64/boot/dts/allwinner/ |
H A D | sun50i-h5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 #include <arm/allwinner/sunxi-h3-h5.dtsi> 6 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <0>; 14 compatible = "arm,cortex-a53"; 17 enable-method = "psci"; 19 clock-latency-ns = <244144>; /* 8 32k periods */ 20 #cooling-cells = <2>; 24 compatible = "arm,cortex-a53"; [all …]
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/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun8i-a33.dtsi | 2 * Copyright 2014 Chen-Yu Tsai 4 * Chen-Yu Tsai <wens@csie.org> 6 * This file is dual-licensed: you can use it either under the terms 45 #include "sun8i-a23-a33.dtsi" 46 #include <dt-bindings/thermal/thermal.h> 49 cpu0_opp_table: opp-table-cpu { 50 compatible = "operating-points-v2"; 51 opp-shared; 53 opp-120000000 { 54 opp-hz = /bits/ 64 <120000000>; [all …]
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H A D | sun8i-a83t.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 48 #include <dt-bindings/clock/sun8i-de2.h> 49 #include <dt-bindings/clock/sun8i-r-ccu.h> 50 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 51 #include <dt-bindings/reset/sun8i-de2.h> 52 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 #include <dt-bindings/thermal/thermal.h> 56 interrupt-parent = <&gic>; [all …]
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H A D | sun8i-h3.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include "sunxi-h3-h5.dtsi" 44 #include <dt-bindings/thermal/thermal.h> 47 cpu0_opp_table: opp-table-cpu { 48 compatible = "operating-points-v2"; 49 opp-shared; 51 opp-648000000 { 52 opp-hz = /bits/ 64 <648000000>; 53 opp-microvolt = <1040000 1040000 1300000>; 54 clock-latency-ns = <244144>; /* 8 32k periods */ [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; 47 clock-names = "bus"; [all …]
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H A D | exynos4412-prime.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 * non-Prime version. Therefore we need to update OPPs table and 12 * thermal maps accordingly. 16 /delete-property/turbo-mode; 20 opp-1600000000 { 21 opp-hz = /bits/ 64 <1600000000>; 22 opp-microvolt = <1350000>; 23 clock-latency-ns = <200000>; 25 opp-1704000000 { 26 opp-hz = /bits/ 64 <1704000000>; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | ipq9574.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 9 #include <dt-bindings/clock/qcom,apss-ipq.h> 10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 11 #include <dt-bindings/interconnect/qcom,ipq9574.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 14 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <2>; [all …]
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H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/interconnect/qcom,msm8996.h> 11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> [all …]
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H A D | ipq6018.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 11 #include <dt-bindings/clock/qcom,apss-ipq.h> 12 #include <dt-bindings/thermal/thermal.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&intc>; 20 sleep_clk: sleep-clk { [all …]
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H A D | msm8976.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno 9 #include <dt-bindings/clock/qcom,gcc-msm8976.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <2>; [all …]
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/linux/Documentation/devicetree/bindings/sound/ |
H A D | st,sta32x.txt | 7 - compatible: "st,sta32x" 8 - reg: the I2C address of the device for I2C 9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 12 - power-down-gpios: a GPIO spec for the power down pin. If specified, 16 - Vdda-supply: regulator spec, providing 3.3V 17 - Vdd3-supply: regulator spec, providing 3.3V 18 - Vcc-supply: regulator spec, providing 5V - 26V 22 - clocks, clock-names: Clock specifier for XTI input clock. 24 and disabled when it is removed. The 'clock-names' must be set to 'xti'. 26 - st,output-conf: number, Selects the output configuration: [all …]
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H A D | st,sta350.txt | 7 - compatible: "st,sta350" 8 - reg: the I2C address of the device for I2C 9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 12 - power-down-gpios: a GPIO spec for the power down pin. If specified, 16 - vdd-dig-supply: regulator spec, providing 3.3V 17 - vdd-pll-supply: regulator spec, providing 3.3V 18 - vcc-supply: regulator spec, providing 5V - 26V 22 - st,output-conf: number, Selects the output configuration: 23 0: 2-channel (full-bridge) power, 2-channel data-out 24 1: 2 (half-bridge). 1 (full-bridge) on-board power [all …]
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/linux/arch/arm64/boot/dts/socionext/ |
H A D | uniphier-ld20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-ld20"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; [all …]
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H A D | uniphier-pxs3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/uniphier-gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 14 compatible = "socionext,uniphier-pxs3"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 20 #address-cells = <2>; [all …]
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/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm-ns.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 6 #include <dt-bindings/clock/bcm-nsp.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; [all …]
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/linux/arch/arm/boot/dts/socionext/ |
H A D | uniphier-pxs2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 // Copyright (C) 2015-2016 Socionext Inc. 8 #include <dt-bindings/gpio/uniphier-gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 13 compatible = "socionext,uniphier-pxs2"; 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
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/linux/drivers/thermal/broadcom/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only 2 obj-$(CONFIG_BCM2711_THERMAL) += bcm2711_thermal.o 3 obj-$(CONFIG_BCM2835_THERMAL) += bcm2835_thermal.o 4 obj-$(CONFIG_BRCMSTB_THERMAL) += brcmstb_thermal.o 5 obj-$(CONFIG_BCM_NS_THERMAL) += ns-thermal.o 6 obj-$(CONFIG_BCM_SR_THERMAL) += sr-thermal.o
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/linux/Documentation/devicetree/bindings/cpufreq/ |
H A D | nvidia,tegra20-cpufreq.txt | 5 - clocks: Must contain an entry for the CPU clock. 6 See ../clocks/clock-bindings.txt for details. 7 - operating-points-v2: See ../bindings/opp/opp-v2.yaml for details. 8 - #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details. 10 For each opp entry in 'operating-points-v2' table: 11 - opp-supported-hw: Two bitfields indicating: 23 - opp-microvolt: CPU voltage triplet. 26 - cpu-supply: Phandle to the CPU power supply. 31 regulator-name = "vdd_cpu"; 36 compatible = "operating-points-v2"; [all …]
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/linux/Documentation/hwmon/ |
H A D | smsc47b397.rst | 6 * SMSC LPC47B397-NC 8 * SMSC SCH5307-NS 20 - Mark M. Hoffman <mhoffman@lightlink.com> 21 - Utilitek Systems, Inc. 25 The following specification describes the SMSC LPC47B397-NC [1]_ sensor chip 27 provided by Craig Kelly (In-Store Broadcast Network) and edited/corrected 30 .. [1] And SMSC SCH5307-NS and SCH5317, which have different device IDs but are 33 ------------------------------------------------------------------------- 35 Methods for detecting the HP SIO and reading the thermal data on a dc7100 36 ------------------------------------------------------------------------- [all …]
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/linux/tools/power/x86/turbostat/ |
H A D | turbostat.8 | 3 turbostat \- Report processor frequency and idle statistics 12 .RB [ "\--interval seconds" ] 15 idle power-state statistics, temperature and power on X86 processors. 19 in one-shot upon its completion. 22 The 5-second interval can be changed using the --interval option. 26 Options can be specified with a single or double '-', and only as much of the option 27 name as necessary to disambiguate it from others is necessary. Note that options are case-sensitiv… 29 \fB--add attributes\fP add column with counter having specified 'attributes'. The 'location' attri… 39 … event for given device from /sys/bus/event_source/devices/<device>/events/<event> eg. c1-residency 40 …perf/cstate_core/c1-residency would then use /sys/bus/event_source/devices/cstate_core/events/c1-r… [all …]
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/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/hi3660-clock.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; [all …]
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H A D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/hisi,hi6220-resets.h> 10 #include <dt-bindings/clock/hi6220-clock.h> 11 #include <dt-bindings/pinctrl/hisi.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 compatible = "arm,psci-0.2"; [all …]
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/linux/Documentation/devicetree/bindings/firmware/ |
H A D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 25 - .../mailbox/mailbox.txt 26 - .../mailbox/nvidia,tegra186-hsp.yaml 32 - .../clock/clock-bindings.txt 33 - <dt-bindings/clock/tegra186-clock.h> [all …]
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