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/linux/drivers/remoteproc/
H A Dxlnx_r5_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/power/xlnx-zynqmp-power.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/firmware/xlnx-zynqmp.h>
12 #include <linux/mailbox/zynqmp-ipi-message.h>
22 /* IPI buffer MAX length */
34 * reflects possible values of xlnx,cluster-mode dt-property
38 LOCKSTEP_MODE = 1, /* cores execute same code in lockstep,clk-for-clk */
43 * struct mem_bank_data - Memory Bank description
48 * @pm_domain_id: Power-domains id of memory bank for firmware to turn on/off
[all …]
/linux/kernel/irq/
H A Dipi.c1 // SPDX-License-Identifier: GPL-2.0
6 * This file contains driver APIs to the IPI subsystem.
9 #define pr_fmt(fmt) "genirq/ipi: " fmt
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
16 * @domain: IPI domain
17 * @dest: cpumask of CPUs which can receive the IPI
19 * Allocate a virq that can be used to send IPI to any CPU in dest mask.
31 pr_warn("Reservation on a non IPI domain\n"); in irq_reserve_ipi()
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
51 # Generic irq_domain hw <--> linux irq number translation
66 # Support for obsolete non-mapping irq domains
75 # Generic IRQ IPI support
81 # Generic IRQ IPI Mux support
121 out the interrupt descriptors in a more NUMA-friendly way. )
/linux/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Generic helpers for smp ipi calls
30 #include <trace/events/ipi.h>
38 #define CSD_TYPE(_csd) ((_csd)->node.u_flags & CSD_FLAG_TYPE_MASK)
58 if (!zalloc_cpumask_var_node(&cfd->cpumask, GFP_KERNEL, in smpcfd_prepare_cpu()
60 return -ENOMEM; in smpcfd_prepare_cpu()
61 if (!zalloc_cpumask_var_node(&cfd->cpumask_ipi, GFP_KERNEL, in smpcfd_prepare_cpu()
63 free_cpumask_var(cfd->cpumask); in smpcfd_prepare_cpu()
64 return -ENOMEM; in smpcfd_prepare_cpu()
66 cfd->csd = alloc_percpu(call_single_data_t); in smpcfd_prepare_cpu()
[all …]
/linux/arch/arc/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -- Added support for Inter Processor Interrupts
9 * -- Initial Write (Borrowed heavily from ARM)
49 return -EINVAL; in arc_get_cpu_map()
52 return -EINVAL; in arc_get_cpu_map()
59 * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
65 if (arc_get_cpu_map("possible-cpus", &cpumask)) { in arc_init_cpu_possible()
66 pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n", in arc_init_cpu_possible()
81 * - Initialise the CPU possible map early - this describes the CPUs
[all …]
H A Dentry-arcv2.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * ARCv2 ISA based core Low Level Intr/Traps/Exceptions(non-TLB) Handling
51 VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
53 VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
58 .rept NR_CPU_IRQS - 8
81 # Note this disable is only for consistent book-keeping as further interrupts
84 # unless this one returns (or higher prio becomes pending in 2-prio scheme)
98 ;################### Non TLB Exception Handling #############################
118 ; ---------------------------------------------
120 ; - Unlike ARCompact, handles Bus errors for both User/Kernel mode,
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/linux/drivers/irqchip/
H A Dirq-armada-370-xp.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
23 #include <linux/irqchip/irq-msi-lib.h>
46 * +---------------+ +---------------+
48 * | per-CPU | | per-CPU |
52 * +---------------+ +---------------+
57 * +-------------------+
62 * +-------------------+
70 * registers, which are relative to "mpic->base".
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H A Dirq-apple-aic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Based on irq-lpc32xx:
6 * Copyright 2015-2016 Vladimir Zapolskiy <vz@mleia.com>
7 * Based on irq-bcm2836:
14 * - 896 level-triggered hardware IRQs
15 * - Single mask bit per IRQ
16 * - Per-IRQ affinity setting
17 * - Automatic masking on event delivery (auto-ack)
18 * - Software triggering (ORed with hw line)
19 * - 2 per-CPU IPIs (meant as "self" and "other", but they are
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/linux/Documentation/virt/kvm/
H A Dvcpu-requests.rst1 .. SPDX-License-Identifier: GPL-2.0
46 ----------
49 order to perform some KVM maintenance. To do so, an IPI is sent, forcing
55 1) Send an IPI. This forces a guest mode exit.
64 ---------
66 VCPUs have a mode state, ``vcpu->mode``, that is used to track whether the
68 outside guest mode states. The architecture may use ``vcpu->mode`` to
70 as well as to avoid sending unnecessary IPIs (see "IPI Reduction"), and
71 even to ensure IPI acknowledgements are waited upon (see "Waiting for
96 VCPU requests are simply bit indices of the ``vcpu->requests`` bitmap.
[all …]
/linux/arch/x86/kernel/apic/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for local APIC drivers and for the IO-APIC code
6 # Leads to non-deterministic coverage that is not a function of syscall inputs.
10 obj-$(CONFIG_X86_LOCAL_APIC) += apic.o apic_common.o apic_noop.o ipi.o vector.o init.o
11 obj-y += hw_nmi.o
13 obj-$(CONFIG_X86_IO_APIC) += io_apic.o
14 obj-$(CONFIG_PCI_MSI) += msi.o
15 obj-$(CONFIG_SMP) += ipi.o
19 obj-$(CONFIG_X86_NUMACHIP) += apic_numachip.o
20 obj-$(CONFIG_X86_UV) += x2apic_uv_x.o
[all …]
/linux/arch/arm/include/asm/
H A Dsmp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2005 ARM Ltd.
15 # error "<asm/smp.h> included in non-SMP build"
18 #define raw_smp_processor_id() (current_thread_info()->cpu)
23 * generate IPI list text
28 * Called from C code, this handles an IPI.
38 * Register IPI interrupts with the arch SMP code
/linux/Documentation/RCU/Design/Expedited-Grace-Periods/
H A DExpedited-Grace-Periods.rst13 There are two flavors of RCU (RCU-preempt and RCU-sched), with an earlier
14 third RCU-bh flavor having been implemented in terms of the other two.
27 each of which results in an IPI to the target CPU.
38 RCU-preempt Expedited Grace Periods
41 ``CONFIG_PREEMPTION=y`` kernels implement RCU-preempt.
42 The overall flow of the handling of a given CPU by an RCU-preempt
45 .. kernel-figure:: ExpRCUFlow.svg
48 The dotted arrows denote indirect action, for example, an IPI
55 ``smp_call_function_single()`` to send the CPU an IPI, which
59 can check to see if the CPU is currently running in an RCU read-side
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/linux/scripts/gdb/linux/
H A Dinterrupts.py1 # SPDX-License-Identifier: GPL-2.0
59 name = "-"
69 text += " %-8s" % ("Level" if irqd_is_level(desc) else "Edge")
72 text += "-%-8s" % (desc['name'].string())
118 text = x86_show_irqstat(prec, "NMI", '__nmi_count', 'Non-maskable interrupts')
155 …text += x86_show_irqstat(prec, "PIN", 'kvm_posted_intr_ipis', 'Posted-interrupt notification event…
156 …text += x86_show_irqstat(prec, "NPI", 'kvm_posted_intr_nested_ipis', 'Nested posted-interrupt even…
157 …text += x86_show_irqstat(prec, "PIW", 'kvm_posted_intr_wakeup_ipis', 'Posted-interrupt wakeup even…
174 for ipi in range(nr_ipi):
175 text += "%*s%u:%s" % (prec - 1, "IPI", ipi, sep)
[all …]
/linux/arch/x86/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * (c) 1998-99, 2000, 2009 Ingo Molnar <mingo@redhat.com>
46 * None of the E1AP-E3AP errata are visible to the user.
53 * None of the A1AP-A3AP errata are visible to the user.
60 * None of 1AP-9AP errata are visible to the normal user,
62 * This is very rare and a non-problem.
64 * 1AP. Linux maps APIC as non-cacheable
71 * 6AP. 'noapic' mode might be affected - fixed in later steppings
94 * 6AP. not affected - worked around in hardware
95 * 7AP. not affected - worked around in hardware
[all …]
/linux/arch/powerpc/include/asm/
H A Dmpic.h1 /* SPDX-License-Identifier: GPL-2.0 */
71 * Per-Processor registers
92 * Per-source registers
149 * Per-Processor registers
162 * Per-source registers
284 /* vector numbers used for internal sources (ipi/timers) */
355 /* Set this for a big-endian MPIC */
359 /* Broken IPI registers (autodetected) */
367 /* MPIC has 11-bit vector fields (or larger) */
412 * standard ISU-less setup (aka powermac)
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dapple,aic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
19 - Level-triggered hardware IRQs wired to SoC blocks
20 - Single mask bit per IRQ
21 - Per-IRQ affinity setting
22 - Automatic masking on event delivery (auto-ack)
23 - Software triggering (ORed with hw line)
[all …]
/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dvdec_vpu_if.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 * struct vdec_vpu_inst - VPU instance for video codec
14 * @id : ipi msg id for each decoder
23 * @signaled : 1 - Host has received ack message from VPU, 0 - not received
26 * @handler : ipi handler for each decoder
49 * vpu_dec_init - init decoder instance and allocate required resource in VPU.
56 * vpu_dec_start - start decoding, basically the function will be invoked once
66 * vpu_dec_end - end decoding, basically the function will be invoked once
76 * vpu_dec_deinit - deinit decoder instance and resource freed in VPU.
83 * vpu_dec_reset - reset decoder, use for flush decoder when end of stream or
[all …]
/linux/include/linux/
H A Dresctrl.h1 /* SPDX-License-Identifier: GPL-2.0 */
19 #define RESCTRL_PICK_ANY_CPU -1
36 (_r) && (_r)->rid < RDT_NUM_RESOURCES; \
37 (_r) = resctrl_arch_get_resource((_r)->rid + 1))
41 if ((r)->alloc_capable || (r)->mon_capable)
45 if ((r)->alloc_capable)
49 if ((r)->mon_capable)
62 * enum resctrl_conf_type - The type of configuration.
76 * struct pseudo_lock_region - pseudo-lock region information
78 * pseudo-locked region belongs
[all …]
/linux/arch/arm64/include/asm/
H A Dcacheflush.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1999-2002 Russell King.
29 * See Documentation/core-api/cachetlb.rst for more information. Please note that
30 * the implementation assumes non-aliasing VIPT D-cache and (aliasing)
31 * VIPT I-cache.
34 * - start - virtual start address (inclusive)
35 * - end - virtual end address (exclusive)
39 * Ensure coherency between the I-cache and the D-cache region to
44 * Ensure coherency between the I-cache and the D-cache region to
50 * Invalidate I-cache region to the Point of Unification.
[all …]
/linux/drivers/xen/events/
H A Devents_base.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * must dynamically map irqs<->event channels. The event channels
15 * 1. Inter-domain notifications. This includes all the virtual
16 * device events, since they're driven by front-ends in another domain
18 * 2. VIRQs, typically used for timers. These are per-cpu events.
20 * 4. PIRQs - Hardware interrupts.
59 #include <xen/xen-ops.h>
87 * type - enum xen_irq_type
88 * event channel - irq->event channel mapping
89 * cpu - cpu this event channel is bound to
[all …]
/linux/arch/powerpc/kernel/
H A Dsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * PowerPC-64 Support added by Dave Engebretsen, Peter Bergner, and
66 #include <trace/events/ipi.h>
117 * On big-cores system, thread_group_l1_cache_map for each CPU corresponds to
118 * the set its siblings that share the L1-cache.
123 * On some big-cores system, thread_group_l2_cache_map for each CPU
125 * L2-cache.
150 /* Special case - we inhibit secondary thread startup in smp_generic_cpu_bootable()
169 return -EINVAL; in smp_generic_kick_cpu()
173 * cpu_start field to become non-zero After we set cpu_start, in smp_generic_kick_cpu()
[all …]
/linux/arch/powerpc/kvm/
H A Dbook3s_xive.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #define pr_fmt(fmt) "xive-kvm: " fmt
23 #include <asm/xive-regs.h>
33 #define __x_eoi_page(xd) ((void __iomem *)((xd)->eoi_mmio))
34 #define __x_trig_page(xd) ((void __iomem *)((xd)->trig_mmio))
65 xc->pending |= 1 << cppr; in xive_vm_ack_pending()
68 if (cppr >= xc->hw_cppr) in xive_vm_ack_pending()
69 pr_warn("KVM-XIVE: CPU %d odd ack CPPR, got %d at %d\n", in xive_vm_ack_pending()
70 smp_processor_id(), cppr, xc->hw_cppr); in xive_vm_ack_pending()
74 * xc->cppr, this will be done as we scan for interrupts in xive_vm_ack_pending()
[all …]
H A Dbook3s_hv_rm_xics.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <asm/ppc-opcode.h>
20 #include <asm/pnv-pci.h>
37 /* -- ICS routines -- */
44 struct ics_irq_state *state = &ics->irq_state[i]; in ics_rm_check_resend()
45 if (state->resend) in ics_rm_check_resend()
46 icp_rm_deliver_irq(xics, icp, state->number, true); in ics_rm_check_resend()
51 /* -- ICP routines -- */
59 kvmppc_host_rm_ops_hv->rm_core[hcore].rm_data = vcpu; in icp_send_hcore_msg()
78 * Returns -1, if no CPU could be found in the host
[all …]
/linux/arch/x86/kvm/vmx/
H A Dposted_intr.c1 // SPDX-License-Identifier: GPL-2.0-only
18 * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()
28 * Protect the per-CPU list with a per-CPU spinlock to handle task migration.
30 * ->sched_in() path will need to take the vCPU off the list of the _previous_
40 return &(to_vt(vcpu)->pi_desc); in vcpu_to_pi_desc()
51 if (!try_cmpxchg64(&pi_desc->control, pold, new)) in pi_try_set_control()
52 return -EBUSY; in pi_try_set_control()
66 * To simplify hot-plug and dynamic toggling of APICv, keep PI.NDST and in vmx_vcpu_pi_load()
67 * PI.SN up-to-date even if there is no assigned device or if APICv is in vmx_vcpu_pi_load()
68 * deactivated due to a dynamic inhibit bit, e.g. for Hyper-V's SyncIC. in vmx_vcpu_pi_load()
[all …]
/linux/arch/powerpc/sysdev/xive/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 #include <asm/xive-regs.h>
34 #include "xive-internal.h"
40 #define DBG_VERBOSE(fmt, ...) pr_devel("cpu %d - " fmt, \
73 * Use early_cpu_to_node() for hot-plugged CPUs
85 #define XIVE_INVALID_TARGET (-1)
94 return xd->flags & XIVE_IRQ_FLAG_STORE_EOI && xive_store_eoi; in xive_is_store_eoi()
107 if (!q->qpage) in xive_read_eq()
109 cur = be32_to_cpup(q->qpage + q->idx); in xive_read_eq()
112 if ((cur >> 31) == q->toggle) in xive_read_eq()
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