1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2d9817ebeSThomas Gleixnermenu "IRQ subsystem" 3d9817ebeSThomas Gleixner# Options selectable by the architecture code 4c68fd4f3SThomas Gleixner 5c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 62ed86b16SRob Herringconfig MAY_HAVE_SPARSE_IRQ 7fd4afaf3SJan Beulich bool 8d9817ebeSThomas Gleixner 9c940e01cSThomas Gleixner# Legacy support, required for itanic 10c940e01cSThomas Gleixnerconfig GENERIC_IRQ_LEGACY 11c940e01cSThomas Gleixner bool 12c940e01cSThomas Gleixner 13c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 14d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 15fd4afaf3SJan Beulich bool 16d9817ebeSThomas Gleixner 17c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 18c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 19fd4afaf3SJan Beulich bool 20c78b9b65SThomas Gleixner 21ab7798ffSThomas Gleixner# Print level/edge extra information 22ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 23ab7798ffSThomas Gleixner bool 24ab7798ffSThomas Gleixner 250d3f5425SThomas Gleixner# Supports effective affinity mask 260d3f5425SThomas Gleixnerconfig GENERIC_IRQ_EFFECTIVE_AFF_MASK 270e6c027cSSamuel Holland depends on SMP 280d3f5425SThomas Gleixner bool 290d3f5425SThomas Gleixner 30c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 31d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 32fd4afaf3SJan Beulich bool 33d9817ebeSThomas Gleixner 34f1e0bb0aSYang Yingliang# Support for generic irq migrating off cpu before the cpu is offline. 35f1e0bb0aSYang Yingliangconfig GENERIC_IRQ_MIGRATION 36f1e0bb0aSYang Yingliang bool 37f1e0bb0aSYang Yingliang 38c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 39d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 40fd4afaf3SJan Beulich bool 41d9817ebeSThomas Gleixner 42acd26bcfSThomas Gleixner# Interrupt injection mechanism 43acd26bcfSThomas Gleixnerconfig GENERIC_IRQ_INJECTION 44acd26bcfSThomas Gleixner bool 45acd26bcfSThomas Gleixner 46c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 47d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 48fd4afaf3SJan Beulich bool 49d9817ebeSThomas Gleixner 50c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 51c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 52c42321c7SThomas Gleixner bool 53923fa4eaSNitin A Kamble select IRQ_DOMAIN 54c42321c7SThomas Gleixner 5508a543adSGrant Likely# Generic irq_domain hw <--> linux irq number translation 5608a543adSGrant Likelyconfig IRQ_DOMAIN 5708a543adSGrant Likely bool 5808a543adSGrant Likely 59b19af510SBartosz Golaszewski# Support for simulated interrupts 60b19af510SBartosz Golaszewskiconfig IRQ_SIM 61b19af510SBartosz Golaszewski bool 62b19af510SBartosz Golaszewski select IRQ_WORK 63337cbeb2SBartosz Golaszewski select IRQ_DOMAIN 64b19af510SBartosz Golaszewski 65f8264e34SJiang Liu# Support for hierarchical irq domains 66f8264e34SJiang Liuconfig IRQ_DOMAIN_HIERARCHY 67f8264e34SJiang Liu bool 68f8264e34SJiang Liu select IRQ_DOMAIN 69f8264e34SJiang Liu 70e37af801SMarc Zyngier# Support for obsolete non-mapping irq domains 71e37af801SMarc Zyngierconfig IRQ_DOMAIN_NOMAP 72e37af801SMarc Zyngier bool 73e37af801SMarc Zyngier select IRQ_DOMAIN 74e37af801SMarc Zyngier 757703b08cSDavid Daney# Support for hierarchical fasteoi+edge and fasteoi+level handlers 767703b08cSDavid Daneyconfig IRQ_FASTEOI_HIERARCHY_HANDLERS 777703b08cSDavid Daney bool 787703b08cSDavid Daney 79379b6564SQais Yousef# Generic IRQ IPI support 80379b6564SQais Yousefconfig GENERIC_IRQ_IPI 81379b6564SQais Yousef bool 820f5209feSSamuel Holland depends on SMP 83151a5351SMarc Zyngier select IRQ_DOMAIN_HIERARCHY 84379b6564SQais Yousef 85835a486cSAnup Patel# Generic IRQ IPI Mux support 86835a486cSAnup Patelconfig GENERIC_IRQ_IPI_MUX 87835a486cSAnup Patel bool 88835a486cSAnup Patel depends on SMP 89835a486cSAnup Patel 9013e7accbSThomas Gleixner# Generic MSI hierarchical interrupt domain support 91f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ 92f3cf8bb0SJiang Liu bool 93f3cf8bb0SJiang Liu select IRQ_DOMAIN_HIERARCHY 94f3cf8bb0SJiang Liu 9596093fe5SJason Gunthorpe# irqchip drivers should select this if they call iommu_dma_prepare_msi() 96aaebdf8dSJulien Grallconfig IRQ_MSI_IOMMU 97aaebdf8dSJulien Grall bool 98aaebdf8dSJulien Grall 99b2d3d61aSDaniel Lezcanoconfig IRQ_TIMINGS 100b2d3d61aSDaniel Lezcano bool 101b2d3d61aSDaniel Lezcano 1022f75d9e1SThomas Gleixnerconfig GENERIC_IRQ_MATRIX_ALLOCATOR 1032f75d9e1SThomas Gleixner bool 1042f75d9e1SThomas Gleixner 1052b5175c4SThomas Gleixnerconfig GENERIC_IRQ_RESERVATION_MODE 1062b5175c4SThomas Gleixner bool 1072b5175c4SThomas Gleixner 10899cf63c5SBitao Hu# Snapshot for interrupt statistics 10999cf63c5SBitao Huconfig GENERIC_IRQ_STAT_SNAPSHOT 11099cf63c5SBitao Hu bool 11199cf63c5SBitao Hu 112c68fd4f3SThomas Gleixner# Support forced irq threading 1138d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 1148d32a307SThomas Gleixner bool 1158d32a307SThomas Gleixner 116d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 1172ed86b16SRob Herring bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 118a7f7f624SMasahiro Yamada help 119d9817ebeSThomas Gleixner 120d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 121d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 122d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 123d9817ebeSThomas Gleixner 124d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 125d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 126d9817ebeSThomas Gleixner 127d9817ebeSThomas Gleixner If you don't know what to do here, say N. 128d9817ebeSThomas Gleixner 129087cdfb6SThomas Gleixnerconfig GENERIC_IRQ_DEBUGFS 130087cdfb6SThomas Gleixner bool "Expose irq internals in debugfs" 131087cdfb6SThomas Gleixner depends on DEBUG_FS 132acd26bcfSThomas Gleixner select GENERIC_IRQ_INJECTION 133087cdfb6SThomas Gleixner default n 134a7f7f624SMasahiro Yamada help 135087cdfb6SThomas Gleixner 136087cdfb6SThomas Gleixner Exposes internal state information through debugfs. Mostly for 137087cdfb6SThomas Gleixner developers and debugging of hard to diagnose interrupt problems. 138087cdfb6SThomas Gleixner 139087cdfb6SThomas Gleixner If you don't know what to do here, say N. 140087cdfb6SThomas Gleixner 141bad6722eSEliav Farber# Clear forwarded VM interrupts during kexec. 142bad6722eSEliav Farber# This option ensures the kernel clears active states for interrupts 143bad6722eSEliav Farber# forwarded to virtual machines (VMs) during a machine kexec. 144bad6722eSEliav Farberconfig GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD 145bad6722eSEliav Farber bool 146bad6722eSEliav Farber 147*66067c3cSBrian Norrisconfig IRQ_KUNIT_TEST 148*66067c3cSBrian Norris bool "KUnit tests for IRQ management APIs" if !KUNIT_ALL_TESTS 149*66067c3cSBrian Norris depends on KUNIT=y 150*66067c3cSBrian Norris default KUNIT_ALL_TESTS 151*66067c3cSBrian Norris imply SMP 152*66067c3cSBrian Norris help 153*66067c3cSBrian Norris This option enables KUnit tests for the IRQ subsystem API. These are 154*66067c3cSBrian Norris only for development and testing, not for regular kernel use cases. 155*66067c3cSBrian Norris 156*66067c3cSBrian Norris If unsure, say N. 157*66067c3cSBrian Norris 158d9817ebeSThomas Gleixnerendmenu 159caacdbf4SPalmer Dabbelt 160caacdbf4SPalmer Dabbeltconfig GENERIC_IRQ_MULTI_HANDLER 161caacdbf4SPalmer Dabbelt bool 162caacdbf4SPalmer Dabbelt help 163caacdbf4SPalmer Dabbelt Allow to specify the low level IRQ handler at run time. 1648d15a729SMarc Zyngier 1658d15a729SMarc Zyngier# Cavium Octeon is the last system to use this deprecated option 1668d15a729SMarc Zyngier# Do not even think of enabling this on any new platform 1678d15a729SMarc Zyngierconfig DEPRECATED_IRQ_CPU_ONOFFLINE 1688d15a729SMarc Zyngier bool 1698d15a729SMarc Zyngier depends on CAVIUM_OCTEON_SOC 1708d15a729SMarc Zyngier default CAVIUM_OCTEON_SOC 171