1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2d9817ebeSThomas Gleixnermenu "IRQ subsystem" 3d9817ebeSThomas Gleixner# Options selectable by the architecture code 4c68fd4f3SThomas Gleixner 5c68fd4f3SThomas Gleixner# Make sparse irq Kconfig switch below available 62ed86b16SRob Herringconfig MAY_HAVE_SPARSE_IRQ 7fd4afaf3SJan Beulich bool 8d9817ebeSThomas Gleixner 9c68fd4f3SThomas Gleixner# Enable the generic irq autoprobe mechanism 10d9817ebeSThomas Gleixnerconfig GENERIC_IRQ_PROBE 11fd4afaf3SJan Beulich bool 12d9817ebeSThomas Gleixner 13c68fd4f3SThomas Gleixner# Use the generic /proc/interrupts implementation 14c78b9b65SThomas Gleixnerconfig GENERIC_IRQ_SHOW 15fd4afaf3SJan Beulich bool 16c78b9b65SThomas Gleixner 17ab7798ffSThomas Gleixner# Print level/edge extra information 18ab7798ffSThomas Gleixnerconfig GENERIC_IRQ_SHOW_LEVEL 19ab7798ffSThomas Gleixner bool 20ab7798ffSThomas Gleixner 210d3f5425SThomas Gleixner# Supports effective affinity mask 220d3f5425SThomas Gleixnerconfig GENERIC_IRQ_EFFECTIVE_AFF_MASK 230e6c027cSSamuel Holland depends on SMP 240d3f5425SThomas Gleixner bool 250d3f5425SThomas Gleixner 26c68fd4f3SThomas Gleixner# Support for delayed migration from interrupt context 27d9817ebeSThomas Gleixnerconfig GENERIC_PENDING_IRQ 28fd4afaf3SJan Beulich bool 29d9817ebeSThomas Gleixner 30f1e0bb0aSYang Yingliang# Support for generic irq migrating off cpu before the cpu is offline. 31f1e0bb0aSYang Yingliangconfig GENERIC_IRQ_MIGRATION 32f1e0bb0aSYang Yingliang bool 33f1e0bb0aSYang Yingliang 34c68fd4f3SThomas Gleixner# Alpha specific irq affinity mechanism 35d9817ebeSThomas Gleixnerconfig AUTO_IRQ_AFFINITY 36fd4afaf3SJan Beulich bool 37d9817ebeSThomas Gleixner 38acd26bcfSThomas Gleixner# Interrupt injection mechanism 39acd26bcfSThomas Gleixnerconfig GENERIC_IRQ_INJECTION 40acd26bcfSThomas Gleixner bool 41acd26bcfSThomas Gleixner 42c68fd4f3SThomas Gleixner# Tasklet based software resend for pending interrupts on enable_irq() 43d9817ebeSThomas Gleixnerconfig HARDIRQS_SW_RESEND 44fd4afaf3SJan Beulich bool 45d9817ebeSThomas Gleixner 46c42321c7SThomas Gleixner# Generic configurable interrupt chip implementation 47c42321c7SThomas Gleixnerconfig GENERIC_IRQ_CHIP 48c42321c7SThomas Gleixner bool 49923fa4eaSNitin A Kamble select IRQ_DOMAIN 50c42321c7SThomas Gleixner 5108a543adSGrant Likely# Generic irq_domain hw <--> linux irq number translation 5208a543adSGrant Likelyconfig IRQ_DOMAIN 5308a543adSGrant Likely bool 5408a543adSGrant Likely 55b19af510SBartosz Golaszewski# Support for simulated interrupts 56b19af510SBartosz Golaszewskiconfig IRQ_SIM 57b19af510SBartosz Golaszewski bool 58b19af510SBartosz Golaszewski select IRQ_WORK 59337cbeb2SBartosz Golaszewski select IRQ_DOMAIN 60b19af510SBartosz Golaszewski 61f8264e34SJiang Liu# Support for hierarchical irq domains 62f8264e34SJiang Liuconfig IRQ_DOMAIN_HIERARCHY 63f8264e34SJiang Liu bool 64f8264e34SJiang Liu select IRQ_DOMAIN 65f8264e34SJiang Liu 66e37af801SMarc Zyngier# Support for obsolete non-mapping irq domains 67e37af801SMarc Zyngierconfig IRQ_DOMAIN_NOMAP 68e37af801SMarc Zyngier bool 69e37af801SMarc Zyngier select IRQ_DOMAIN 70e37af801SMarc Zyngier 717703b08cSDavid Daney# Support for hierarchical fasteoi+edge and fasteoi+level handlers 727703b08cSDavid Daneyconfig IRQ_FASTEOI_HIERARCHY_HANDLERS 737703b08cSDavid Daney bool 747703b08cSDavid Daney 75379b6564SQais Yousef# Generic IRQ IPI support 76379b6564SQais Yousefconfig GENERIC_IRQ_IPI 77379b6564SQais Yousef bool 780f5209feSSamuel Holland depends on SMP 79151a5351SMarc Zyngier select IRQ_DOMAIN_HIERARCHY 80379b6564SQais Yousef 81835a486cSAnup Patel# Generic IRQ IPI Mux support 82835a486cSAnup Patelconfig GENERIC_IRQ_IPI_MUX 83835a486cSAnup Patel bool 84835a486cSAnup Patel depends on SMP 85835a486cSAnup Patel 8613e7accbSThomas Gleixner# Generic MSI hierarchical interrupt domain support 87f3cf8bb0SJiang Liuconfig GENERIC_MSI_IRQ 88f3cf8bb0SJiang Liu bool 89f3cf8bb0SJiang Liu select IRQ_DOMAIN_HIERARCHY 90f3cf8bb0SJiang Liu 9196093fe5SJason Gunthorpe# irqchip drivers should select this if they call iommu_dma_prepare_msi() 92aaebdf8dSJulien Grallconfig IRQ_MSI_IOMMU 93aaebdf8dSJulien Grall bool 94aaebdf8dSJulien Grall 952f75d9e1SThomas Gleixnerconfig GENERIC_IRQ_MATRIX_ALLOCATOR 962f75d9e1SThomas Gleixner bool 972f75d9e1SThomas Gleixner 982b5175c4SThomas Gleixnerconfig GENERIC_IRQ_RESERVATION_MODE 992b5175c4SThomas Gleixner bool 1002b5175c4SThomas Gleixner 10199cf63c5SBitao Hu# Snapshot for interrupt statistics 10299cf63c5SBitao Huconfig GENERIC_IRQ_STAT_SNAPSHOT 10399cf63c5SBitao Hu bool 10499cf63c5SBitao Hu 105c68fd4f3SThomas Gleixner# Support forced irq threading 1068d32a307SThomas Gleixnerconfig IRQ_FORCED_THREADING 1078d32a307SThomas Gleixner bool 1088d32a307SThomas Gleixner 109d9817ebeSThomas Gleixnerconfig SPARSE_IRQ 1102ed86b16SRob Herring bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 111a7f7f624SMasahiro Yamada help 112d9817ebeSThomas Gleixner 113d9817ebeSThomas Gleixner Sparse irq numbering is useful for distro kernels that want 114d9817ebeSThomas Gleixner to define a high CONFIG_NR_CPUS value but still want to have 115d9817ebeSThomas Gleixner low kernel memory footprint on smaller machines. 116d9817ebeSThomas Gleixner 117d9817ebeSThomas Gleixner ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 118d9817ebeSThomas Gleixner out the interrupt descriptors in a more NUMA-friendly way. ) 119d9817ebeSThomas Gleixner 120d9817ebeSThomas Gleixner If you don't know what to do here, say N. 121d9817ebeSThomas Gleixner 122087cdfb6SThomas Gleixnerconfig GENERIC_IRQ_DEBUGFS 123087cdfb6SThomas Gleixner bool "Expose irq internals in debugfs" 124087cdfb6SThomas Gleixner depends on DEBUG_FS 125acd26bcfSThomas Gleixner select GENERIC_IRQ_INJECTION 126087cdfb6SThomas Gleixner default n 127a7f7f624SMasahiro Yamada help 128087cdfb6SThomas Gleixner 129087cdfb6SThomas Gleixner Exposes internal state information through debugfs. Mostly for 130087cdfb6SThomas Gleixner developers and debugging of hard to diagnose interrupt problems. 131087cdfb6SThomas Gleixner 132087cdfb6SThomas Gleixner If you don't know what to do here, say N. 133087cdfb6SThomas Gleixner 134bad6722eSEliav Farber# Clear forwarded VM interrupts during kexec. 135bad6722eSEliav Farber# This option ensures the kernel clears active states for interrupts 136bad6722eSEliav Farber# forwarded to virtual machines (VMs) during a machine kexec. 137bad6722eSEliav Farberconfig GENERIC_IRQ_KEXEC_CLEAR_VM_FORWARD 138bad6722eSEliav Farber bool 139bad6722eSEliav Farber 14066067c3cSBrian Norrisconfig IRQ_KUNIT_TEST 14166067c3cSBrian Norris bool "KUnit tests for IRQ management APIs" if !KUNIT_ALL_TESTS 14266067c3cSBrian Norris depends on KUNIT=y 143*0c888bc8SBrian Norris depends on SPARSE_IRQ 14466067c3cSBrian Norris default KUNIT_ALL_TESTS 145f8a44f9bSBrian Norris select IRQ_DOMAIN 14666067c3cSBrian Norris imply SMP 14766067c3cSBrian Norris help 14866067c3cSBrian Norris This option enables KUnit tests for the IRQ subsystem API. These are 14966067c3cSBrian Norris only for development and testing, not for regular kernel use cases. 15066067c3cSBrian Norris 15166067c3cSBrian Norris If unsure, say N. 15266067c3cSBrian Norris 153d9817ebeSThomas Gleixnerendmenu 154caacdbf4SPalmer Dabbelt 155caacdbf4SPalmer Dabbeltconfig GENERIC_IRQ_MULTI_HANDLER 156caacdbf4SPalmer Dabbelt bool 157caacdbf4SPalmer Dabbelt help 158caacdbf4SPalmer Dabbelt Allow to specify the low level IRQ handler at run time. 1598d15a729SMarc Zyngier 1608d15a729SMarc Zyngier# Cavium Octeon is the last system to use this deprecated option 1618d15a729SMarc Zyngier# Do not even think of enabling this on any new platform 1628d15a729SMarc Zyngierconfig DEPRECATED_IRQ_CPU_ONOFFLINE 1638d15a729SMarc Zyngier bool 1648d15a729SMarc Zyngier depends on CAVIUM_OCTEON_SOC 1658d15a729SMarc Zyngier default CAVIUM_OCTEON_SOC 166