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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dmarvell,nand-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand
[all...]
H A Damlogic,meson-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
10 - $ref: nand-controller.yaml
13 - liang.yang@amlogic.com
18 - amlogic,meson-gxl-nfc
19 - amlogic,meson-axg-nfc
24 reg-names:
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H A Dti,gpmc-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC NAND Flash controller.
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
14 GPMC NAND controller/Flash is represented as a child of the
20 - enum:
21 - ti,am64-nand
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H A Datmel-nand.txt1 Atmel NAND flash controller bindings
3 The NAND flash controller node should be defined under the EBI bus (see
4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
5 One or several NAND devices can be defined under this NAND controller.
6 The NAND controller might be connected to an ECC engine.
8 * NAND controller bindings:
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
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H A Draw-nand-chip.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raw NAND Chip Common Properties
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: nand-chip.yaml#
19 {size} bytes for a particular raw NAND chip.
21 The interpretation of these parameters is implementation-defined, so
28 pattern: "^nand@[a-f0-9]$"
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H A Dmarvell-nand.txt1 Marvell NAND Flash Controller (NFC)
4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
[all …]
H A Dgpmc-nand.txt3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of
4 the GPMC controller with a name of "nand".
7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
10 For NAND specific properties such as ECC modes or bus width, please refer to
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
18 NAND I/O space
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
[all …]
H A Dallwinner,sun4i-a10-nand.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 NAND Controller
10 - $ref: nand-controller.yaml
13 - Chen-Yu Tsai <wens@csie.org>
14 - Maxime Ripard <mripard@kernel.org>
19 - allwinner,sun4i-a10-nand
20 - allwinner,sun8i-a23-nand-controller
[all …]
H A Dingenic,nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs NAND controller
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: nand-controller.yaml#
14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
19 - ingenic,jz4740-nand
20 - ingenic,jz4725b-nand
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dpm9g45.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
39 nand {
40 pinctrl_nand_rb: nand-rb-0 {
47 pinctrl_board_mmc: mmc0-board {
56 compatible = "atmel,tcb-timer";
[all …]
H A Dat91-linea.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-linea.dtsi - Device Tree Include file for the Axentia Linea Module.
22 clock-frequency = <32768>;
26 clock-frequency = <12000000>;
31 compatible = "atmel,tcb-timer";
36 compatible = "atmel,tcb-timer";
52 pinctrl-0 = <&pinctrl_ebi_nand_addr>;
53 pinctrl-names = "default";
61 nand: nand@3 { label
63 atmel,rb = <0>;
[all …]
H A Dge863-pro3.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ge863_pro3.dtsi - Device Tree file for Telit GE863-PRO3
14 clock-frequency = <6000000>;
22 compatible = "atmel,tcb-timer";
27 compatible = "atmel,tcb-timer";
40 nand_controller: nand-controller {
42 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
43 pinctrl-names = "default";
45 nand@3 {
47 rb-gpios = <&pioC 13 GPIO_ACTIVE_HIGH>;
[all …]
H A Dtny_a9260_common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * tny_a9260_common.dtsi - Device Tree file for Caloa TNY A926x board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
19 clock-frequency = <32768>;
23 clock-frequency = <12000000>;
31 compatible = "atmel,tcb-timer";
36 compatible = "atmel,tcb-timer";
49 nand_controller: nand-controller {
51 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
52 pinctrl-names = "default";
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H A Dat91sam9x5cm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
16 clock-frequency = <32768>;
20 clock-frequency = <12000000>;
28 compatible = "atmel,tcb-timer";
33 compatible = "atmel,tcb-timer";
40 pinctrl_1wire_cm: 1wire_cm-0 {
52 pinctrl-0 = <&pinctrl_ebi_addr_nand
54 pinctrl-names = "default";
57 nand_controller: nand-controller {
[all …]
H A Dat91-lmu5000.dts1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
24 #address-cells = <1>;
25 #size-cells = <1>;
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <18432000>;
42 nand_controller: nand-controller {
43 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
44 pinctrl-names = "default";
47 nand@3 {
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H A Dtny_a9263.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "atmel,tny-a9263", "atmel,at91sam9263", "atmel,at91sam9";
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 compatible = "atmel,tcb-timer";
45 compatible = "atmel,tcb-timer";
51 atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
[all …]
H A Dat91-cosino.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-cosino.dtsi - Device Tree file for Cosino core module
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
29 clock-frequency = <32768>;
33 clock-frequency = <12000000>;
39 atmel,adc-ts-wires = <4>;
40 atmel,adc-ts-pressure-threshold = <10000>;
49 pinctrl-0 = <&pinctrl_ebi_addr_nand
51 pinctrl-names = "default";
54 nand-controller {
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-zc1751-xm016-dc2.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 model = "ZynqMP zc1751-xm016-dc2 RevA";
20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-r16-nintendo-nes-classic.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
4 /dts-v1/;
5 #include "sun8i-a33.dtsi"
6 #include "sunxi-common-regulators.dtsi"
10 compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
11 "allwinner,sun8i-a33";
18 stdout-path = "serial0:115200n8";
27 pinctrl-names = "default";
28 pinctrl-0 = <&uart0_pf_pins>;
36 nand@0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-395-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /dts-v1/;
11 #include "armada-395.dtsi"
15 compatible = "marvell,a395-gp", "marvell,armada395",
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
62 clock-frequency = <200000000>;
63 broken-cd;
64 wp-inverted;
[all …]
H A Darmada-398-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include "armada-398.dtsi"
15 compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
18 stdout-path = "serial0:115200n8";
30 internal-regs {
32 pinctrl-0 = <&i2c0_pins>;
33 pinctrl-names = "default";
35 clock-frequency = <100000>;
[all …]
H A Darmada-390-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-88F6920)
11 /dts-v1/;
12 #include "armada-390.dtsi"
16 compatible = "marvell,a390-db", "marvell,armada390";
19 stdout-path = "serial0:115200n8";
31 internal-regs {
34 clock-frequency = <100000>;
81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default";
[all …]
H A Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
[all …]
H A Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Dcn9130-db.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Device tree for the CN9130-DB board.
10 #include <dt-bindings/gpio/gpio.h>
14 stdout-path = "serial0:115200n8";
33 ap0_reg_sd_vccq: regulator-1 {
34 compatible = "regulator-gpio";
35 regulator-name = "ap0_sd_vccq";
36 regulator-min-microvolt = <1800000>;
37 regulator-max-microvolt = <3300000>;
42 cp0_reg_usb3_vbus0: regulator-2 {
[all …]

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