1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree file for DB-XC3-24G4XG board 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2016 Allied Telesis Labs 6*f126890aSEmmanuel Vadot * 7*f126890aSEmmanuel Vadot * Based on armada-xp-db.dts 8*f126890aSEmmanuel Vadot * 9*f126890aSEmmanuel Vadot * Note: this Device Tree assumes that the bootloader has remapped the 10*f126890aSEmmanuel Vadot * internal registers to 0xf1000000 (instead of the default 11*f126890aSEmmanuel Vadot * 0xd0000000). The 0xf1000000 is the default used by the recent, 12*f126890aSEmmanuel Vadot * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 13*f126890aSEmmanuel Vadot * boards were delivered with an older version of the bootloader that 14*f126890aSEmmanuel Vadot * left internal registers mapped at 0xd0000000. If you are in this 15*f126890aSEmmanuel Vadot * situation, you should either update your bootloader (preferred 16*f126890aSEmmanuel Vadot * solution) or the below Device Tree should be adjusted. 17*f126890aSEmmanuel Vadot */ 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot/dts-v1/; 20*f126890aSEmmanuel Vadot#include "armada-xp-98dx3336.dtsi" 21*f126890aSEmmanuel Vadot 22*f126890aSEmmanuel Vadot/ { 23*f126890aSEmmanuel Vadot model = "DB-XC3-24G4XG"; 24*f126890aSEmmanuel Vadot compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp"; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot chosen { 27*f126890aSEmmanuel Vadot bootargs = "console=ttyS0,115200 earlyprintk"; 28*f126890aSEmmanuel Vadot }; 29*f126890aSEmmanuel Vadot 30*f126890aSEmmanuel Vadot memory { 31*f126890aSEmmanuel Vadot device_type = "memory"; 32*f126890aSEmmanuel Vadot reg = <0 0x00000000 0 0x40000000>; /* 1 GB */ 33*f126890aSEmmanuel Vadot }; 34*f126890aSEmmanuel Vadot}; 35*f126890aSEmmanuel Vadot 36*f126890aSEmmanuel Vadot&L2 { 37*f126890aSEmmanuel Vadot arm,parity-enable; 38*f126890aSEmmanuel Vadot marvell,ecc-enable; 39*f126890aSEmmanuel Vadot}; 40*f126890aSEmmanuel Vadot 41*f126890aSEmmanuel Vadot&devbus_bootcs { 42*f126890aSEmmanuel Vadot status = "okay"; 43*f126890aSEmmanuel Vadot 44*f126890aSEmmanuel Vadot /* Device Bus parameters are required */ 45*f126890aSEmmanuel Vadot 46*f126890aSEmmanuel Vadot /* Read parameters */ 47*f126890aSEmmanuel Vadot devbus,bus-width = <16>; 48*f126890aSEmmanuel Vadot devbus,turn-off-ps = <60000>; 49*f126890aSEmmanuel Vadot devbus,badr-skew-ps = <0>; 50*f126890aSEmmanuel Vadot devbus,acc-first-ps = <124000>; 51*f126890aSEmmanuel Vadot devbus,acc-next-ps = <248000>; 52*f126890aSEmmanuel Vadot devbus,rd-setup-ps = <0>; 53*f126890aSEmmanuel Vadot devbus,rd-hold-ps = <0>; 54*f126890aSEmmanuel Vadot 55*f126890aSEmmanuel Vadot /* Write parameters */ 56*f126890aSEmmanuel Vadot devbus,sync-enable = <0>; 57*f126890aSEmmanuel Vadot devbus,wr-high-ps = <60000>; 58*f126890aSEmmanuel Vadot devbus,wr-low-ps = <60000>; 59*f126890aSEmmanuel Vadot devbus,ale-wr-ps = <60000>; 60*f126890aSEmmanuel Vadot}; 61*f126890aSEmmanuel Vadot 62*f126890aSEmmanuel Vadot&uart0 { 63*f126890aSEmmanuel Vadot status = "okay"; 64*f126890aSEmmanuel Vadot}; 65*f126890aSEmmanuel Vadot 66*f126890aSEmmanuel Vadot&uart1 { 67*f126890aSEmmanuel Vadot status = "okay"; 68*f126890aSEmmanuel Vadot}; 69*f126890aSEmmanuel Vadot 70*f126890aSEmmanuel Vadot&i2c0 { 71*f126890aSEmmanuel Vadot clock-frequency = <100000>; 72*f126890aSEmmanuel Vadot status = "okay"; 73*f126890aSEmmanuel Vadot}; 74*f126890aSEmmanuel Vadot 75*f126890aSEmmanuel Vadot&nand_controller { 76*f126890aSEmmanuel Vadot status = "okay"; 77*f126890aSEmmanuel Vadot 78*f126890aSEmmanuel Vadot nand@0 { 79*f126890aSEmmanuel Vadot reg = <0>; 80*f126890aSEmmanuel Vadot label = "pxa3xx_nand-0"; 81*f126890aSEmmanuel Vadot nand-rb = <0>; 82*f126890aSEmmanuel Vadot marvell,nand-keep-config; 83*f126890aSEmmanuel Vadot nand-on-flash-bbt; 84*f126890aSEmmanuel Vadot nand-ecc-strength = <4>; 85*f126890aSEmmanuel Vadot nand-ecc-step-size = <512>; 86*f126890aSEmmanuel Vadot }; 87*f126890aSEmmanuel Vadot}; 88*f126890aSEmmanuel Vadot 89*f126890aSEmmanuel Vadot&spi0 { 90*f126890aSEmmanuel Vadot status = "okay"; 91*f126890aSEmmanuel Vadot 92*f126890aSEmmanuel Vadot flash@0 { 93*f126890aSEmmanuel Vadot #address-cells = <1>; 94*f126890aSEmmanuel Vadot #size-cells = <1>; 95*f126890aSEmmanuel Vadot compatible = "m25p64"; 96*f126890aSEmmanuel Vadot reg = <0>; /* Chip select 0 */ 97*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 98*f126890aSEmmanuel Vadot m25p,fast-read; 99*f126890aSEmmanuel Vadot 100*f126890aSEmmanuel Vadot partition@u-boot { 101*f126890aSEmmanuel Vadot reg = <0x00000000 0x00100000>; 102*f126890aSEmmanuel Vadot label = "u-boot"; 103*f126890aSEmmanuel Vadot }; 104*f126890aSEmmanuel Vadot partition@u-boot-env { 105*f126890aSEmmanuel Vadot reg = <0x00100000 0x00040000>; 106*f126890aSEmmanuel Vadot label = "u-boot-env"; 107*f126890aSEmmanuel Vadot }; 108*f126890aSEmmanuel Vadot partition@unused { 109*f126890aSEmmanuel Vadot reg = <0x00140000 0x00ec0000>; 110*f126890aSEmmanuel Vadot label = "unused"; 111*f126890aSEmmanuel Vadot }; 112*f126890aSEmmanuel Vadot 113*f126890aSEmmanuel Vadot }; 114*f126890aSEmmanuel Vadot}; 115