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/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da5xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <enum name="a5xx_color_fmt">
10 <value value="0x02" name="RB5_A8_UNORM"/>
11 <value value="0x03" name="RB5_R8_UNORM"/>
12 <value value="0x04" name="RB5_R8_SNORM"/>
13 <value value="0x05" name="RB5_R8_UINT"/>
14 <value value="0x06" name="RB5_R8_SINT"/>
15 <value value="0x08" name="RB5_R4G4B4A4_UNORM"/>
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H A Da4xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <enum name="a4xx_color_fmt">
10 <value name="RB4_A8_UNORM" value="0x01"/>
11 <value name="RB4_R8_UNORM" value="0x02"/>
12 <value name="RB4_R8_SNORM" value="0x03"/>
13 <value name="RB4_R8_UINT" value="0x04"/>
14 <value name="RB4_R8_SINT" value="0x05"/>
16 <value name="RB4_R4G4B4A4_UNORM" value="0x08"/>
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H A Da3xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <enum name="a3xx_tile_mode">
10 <value name="LINEAR" value="0"/>
11 <value name="TILE_4X4" value="1"/> <!-- "normal" case for textures -->
12 <value name="TILE_32X32" value="2"/> <!-- only used in GMEM -->
13 <value name="TILE_4X2" value="3"/> <!-- only used for CrCb -->
16 <enum name="a3xx_state_block_id">
17 <value name="HLSQ_BLOCK_ID_TP_TEX" value="2"/>
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H A Da6xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
14 <!--
17 - "cmd" - the register is used outside of renderpass and blits,
19 - "rp_blit" - the register is used inside renderpass or blits
26 -->
28 <domain name="A6XX" width="32" prefix="variant" varset="chip">
29 <bitset name="A6XX_RBBM_INT_0_MASK" inline="no" varset="chip">
30 <bitfield name="RBBM_GPU_IDLE" pos="0" type="boolean"/>
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H A Dadreno_common.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
7 <enum name="chip" bare="yes">
8 <value name="A2XX" value="2"/>
9 <value name="A3XX" value="3"/>
10 <value name="A4XX" value="4"/>
11 <value name="A5XX" value="5"/>
12 <value name="A6XX" value="6"/>
13 <value name="A7XX" value="7"/>
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H A Da2xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
10 <enum name="a2xx_rb_dither_type">
11 <value name="DITHER_PIXEL" value="0"/>
12 <value name="DITHER_SUBPIXEL" value="1"/>
15 <enum name="a2xx_colorformatx">
16 <value name="COLORX_4_4_4_4" value="0"/>
17 <value name="COLORX_1_5_5_5" value="1"/>
18 <value name="COLORX_5_6_5" value="2"/>
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/linux/drivers/gpu/drm/msm/registers/display/
H A Dmdp4.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
8 <domain name="MDP4" width="32">
9 <enum name="mdp4_pipe">
11 <value name="VG1" value="0"/>
12 <value name="VG2" value="1"/>
13 <value name="RGB1" value="2"/>
14 <value name="RGB2" value="3"/>
15 <value name="RGB3" value="4"/>
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H A Dedp.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
7 <domain name="EDP" width="32">
8 <enum name="edp_color_depth">
9 <value name="EDP_6BIT" value="0"/>
10 <value name="EDP_8BIT" value="1"/>
11 <value name="EDP_10BIT" value="2"/>
12 <value name="EDP_12BIT" value="3"/>
13 <value name="EDP_16BIT" value="4"/>
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H A Ddsi.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
7 <domain name="DSI" width="32">
8 <enum name="dsi_traffic_mode">
9 <value name="NON_BURST_SYNCH_PULSE" value="0"/>
10 <value name="NON_BURST_SYNCH_EVENT" value="1"/>
11 <value name="BURST_MODE" value="2"/>
13 <enum name="dsi_vid_dst_format">
14 <value name="VID_DST_FORMAT_RGB565" value="0"/>
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H A Dmdp_common.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
8 <!-- random bits that seem same between mdp4 and mdp5 (ie. not much) -->
10 <enum name="mdp_chroma_samp_type">
11 <value name="CHROMA_FULL" value="0"/>
12 <value name="CHROMA_H2V1" value="1"/>
13 <value name="CHROMA_H1V2" value="2"/>
14 <value name="CHROMA_420" value="3"/>
17 <enum name="mdp_fetch_type">
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/linux/include/rv/
H A Dda_monitor.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019-2022 Red Hat, Inc. Daniel Bristot de Oliveira <bristot@kernel.org>
21 #define DECLARE_RV_REACTING_HELPERS(name, type) \ argument
22 static void cond_react_##name(type curr_state, type event) \
24 if (!rv_reacting_on() || !rv_##name.react) \
26 rv_##name.react("rv: monitor %s does not allow event %s on state %s\n", \
27 #name, \
28 model_get_event_name_##name(event), \
29 model_get_state_name_##name(curr_state)); \
34 #define DECLARE_RV_REACTING_HELPERS(name, type) \ argument
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/linux/scripts/kconfig/
H A Dgconf.ui1 <?xml version="1.0" standalone="no"?> <!--*- mode: xml -*-->
6 <property name="visible">True</property>
7 <property name="title" translatable="yes">Gtk Kernel Configurator</property>
8 <property name="type">GTK_WINDOW_TOPLEVEL</property>
9 <property name="window_position">GTK_WIN_POS_NONE</property>
10 <property name="modal">False</property>
11 <property name="default_width">640</property>
12 <property name="default_height">480</property>
13 <property name="resizable">True</property>
14 <property name="destroy_with_parent">False</property>
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/linux/sound/soc/codecs/
H A Dcs48l32.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2016-2018, 2020, 2022, 2025 Cirrus Logic, Inc. and
93 #define CS48L32_MIXER_CONTROLS(name, base) \ argument
94 SOC_SINGLE_RANGE_TLV(name " Input 1 Volume", base, \
97 SOC_SINGLE_RANGE_TLV(name " Input 2 Volume", base + 4, \
100 SOC_SINGLE_RANGE_TLV(name " Input 3 Volume", base + 8, \
103 SOC_SINGLE_RANGE_TLV(name " Input 4 Volume", base + 12, \
107 #define CS48L32_MUX_ENUM_DECL(name, reg) \ argument
109 name, reg, 0, CS48L32_MIXER_SRC_MASK, \
112 #define CS48L32_MUX_CTL_DECL(name) \ argument
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/linux/Documentation/netlink/specs/
H A Dconntrack.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: conntrack
4 protocol: netlink-raw
7 doc: >-
11 -
12 name: nfgenmsg
15 -
16 name: nfgen-family
18 -
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H A Dovpn.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 # Copyright (c) 2024-2025, OpenVPN Inc.
7 ---
8 name: ovpn
15 -
17 name: nonce-tail-size
19 -
21 name: cipher-alg
22 entries: [none, aes-gcm, chacha20-poly1305]
23 -
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H A Dmptcp_pm.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: mptcp_pm
4 protocol: genetlink-legacy
7 c-family-name: mptcp-pm-name
8 c-version-name: mptcp-pm-ver
9 max-by-define: true
10 kernel-policy: per-op
11 cmd-cnt-name: --mptcp-pm-cmd-after-last
14 -
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H A Dnlctrl.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: nlctrl
4 protocol: genetlink-legacy
5 uapi-header: linux/genetlink.h
8 genetlink meta-family that exposes information about all genetlink
12 -
13 name: op-flags
15 enum-name:
17 - admin-perm
[all …]
H A Dnfsd.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
2 ---
3 name: nfsd
5 uapi-header: linux/nfsd_netlink.h
9 attribute-sets:
10 -
11 name: rpc-status
13 -
14 name: xid
16 byte-order: big-endian
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/linux/drivers/clk/bcm/
H A Dclk-bcm63xx-gate.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/clk-provider.h>
8 #include <dt-bindings/clock/bcm3368-clock.h>
9 #include <dt-bindings/clock/bcm6318-clock.h>
10 #include <dt-bindings/clock/bcm6328-clock.h>
11 #include <dt-bindings/clock/bcm6358-clock.h>
12 #include <dt-bindings/clock/bcm6362-clock.h>
13 #include <dt-bindings/clock/bcm6368-clock.h>
14 #include <dt-bindings/clock/bcm63268-clock.h>
17 const char * const name; member
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/linux/drivers/gpu/drm/msm/registers/
H A Drules-fd.xsd1 <?xml version="1.0" encoding="UTF-8"?>
13 For specifications, see the file rules-ng-format.txt
14 in Nouveau CVS module 'rules-ng'.
20 <!-- Elements -->
22 <element name="database" type="rng:databaseType" />
23 <element name="import" type="rng:importType" />
24 <element name="copyright" type="rng:copyrightType" />
25 <element name="domain" type="rng:domainType" />
26 <element name="array" type="rng:arrayType" />
27 <element name="stripe" type="rng:stripeType" />
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/linux/arch/riscv/include/asm/
H A Dgdb_xml.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 "qXfer:features:read:riscv-64bit-cpu.xml";
17 "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
19 "<xi:include href=\"riscv-64bit-cpu.xml\"/>"
24 "<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">"
25 "<feature name=\"org.gnu.gdb.riscv.cpu\">"
26 "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>"
27 "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>"
28 "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>"
29 "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>"
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/linux/drivers/clk/st/
H A Dclk-flexgen.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-flexgen.c
5 * Copyright (C) ST-Microelectronics SA 2013
6 * Author: Maxime Coquelin <maxime.coquelin@st.com> for ST-Microelectronics.
10 #include <linux/clk-provider.h>
20 const char *name; member
36 /* Pre-divisor's gate */
38 /* Pre-divisor */
56 struct clk_hw *pgate_hw = &flexgen->pgate.hw; in flexgen_enable()
57 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_enable()
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/linux/drivers/net/wireless/intel/iwlwifi/mld/
H A Ddebugfs.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2024-2025 Intel Corporation
8 #define MLD_DEBUGFS_OPEN_WRAPPER(name, buflen, argtype) \ argument
9 struct dbgfs_##name##_data { \
15 static int _iwl_dbgfs_##name##_open(struct inode *inode, \
18 struct dbgfs_##name##_data *data; \
20 if ((file->f_flags & O_ACCMODE) == O_RDWR) \
21 return -EOPNOTSUPP; \
25 return -ENOMEM; \
27 data->read_done = false; \
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/linux/drivers/scsi/lpfc/
H A Dlpfc_attr.h4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
24 #define LPFC_ATTR(name, defval, minval, maxval, desc) \ argument
25 static uint lpfc_##name = defval;\
26 module_param(lpfc_##name, uint, S_IRUGO);\
27 MODULE_PARM_DESC(lpfc_##name, desc);\
28 lpfc_param_init(name, defval, minval, maxval)
30 #define LPFC_ATTR_R(name, defval, minval, maxval, desc) \ argument
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/linux/include/trace/events/
H A Dhost1x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Copyright (c) 2010-2013, NVIDIA Corporation.
22 TP_PROTO(const char *name),
23 TP_ARGS(name),
24 TP_STRUCT__entry(__field(const char *, name)),
25 TP_fast_assign(__entry->name = name;),
26 TP_printk("name=%s", __entry->name)
30 TP_PROTO(const char *name),
31 TP_ARGS(name)
35 TP_PROTO(const char *name),
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