1d9657570SVincent Chen /* SPDX-License-Identifier: GPL-2.0-only */ 2d9657570SVincent Chen 3d9657570SVincent Chen #ifndef __ASM_GDB_XML_H_ 4d9657570SVincent Chen #define __ASM_GDB_XML_H_ 5d9657570SVincent Chen 6*70ee5731SVincent Chen const char riscv_gdb_stub_feature[64] = 7d9657570SVincent Chen "PacketSize=800;qXfer:features:read+;"; 8d9657570SVincent Chen 9d9657570SVincent Chen static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:"; 10d9657570SVincent Chen 11d9657570SVincent Chen #ifdef CONFIG_64BIT 12d9657570SVincent Chen static const char gdb_xfer_read_cpuxml[39] = 13d9657570SVincent Chen "qXfer:features:read:riscv-64bit-cpu.xml"; 14d9657570SVincent Chen 15d9657570SVincent Chen static const char riscv_gdb_stub_target_desc[256] = 16d9657570SVincent Chen "l<?xml version=\"1.0\"?>" 17d9657570SVincent Chen "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">" 18d9657570SVincent Chen "<target>" 19d9657570SVincent Chen "<xi:include href=\"riscv-64bit-cpu.xml\"/>" 20d9657570SVincent Chen "</target>"; 21d9657570SVincent Chen 22d9657570SVincent Chen static const char riscv_gdb_stub_cpuxml[2048] = 23d9657570SVincent Chen "l<?xml version=\"1.0\"?>" 24d9657570SVincent Chen "<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">" 25d9657570SVincent Chen "<feature name=\"org.gnu.gdb.riscv.cpu\">" 26d9657570SVincent Chen "<reg name=\""DBG_REG_ZERO"\" bitsize=\"64\" type=\"int\" regnum=\"0\"/>" 27d9657570SVincent Chen "<reg name=\""DBG_REG_RA"\" bitsize=\"64\" type=\"code_ptr\"/>" 28d9657570SVincent Chen "<reg name=\""DBG_REG_SP"\" bitsize=\"64\" type=\"data_ptr\"/>" 29d9657570SVincent Chen "<reg name=\""DBG_REG_GP"\" bitsize=\"64\" type=\"data_ptr\"/>" 30d9657570SVincent Chen "<reg name=\""DBG_REG_TP"\" bitsize=\"64\" type=\"data_ptr\"/>" 31d9657570SVincent Chen "<reg name=\""DBG_REG_T0"\" bitsize=\"64\" type=\"int\"/>" 32d9657570SVincent Chen "<reg name=\""DBG_REG_T1"\" bitsize=\"64\" type=\"int\"/>" 33d9657570SVincent Chen "<reg name=\""DBG_REG_T2"\" bitsize=\"64\" type=\"int\"/>" 34d9657570SVincent Chen "<reg name=\""DBG_REG_FP"\" bitsize=\"64\" type=\"data_ptr\"/>" 35d9657570SVincent Chen "<reg name=\""DBG_REG_S1"\" bitsize=\"64\" type=\"int\"/>" 36d9657570SVincent Chen "<reg name=\""DBG_REG_A0"\" bitsize=\"64\" type=\"int\"/>" 37d9657570SVincent Chen "<reg name=\""DBG_REG_A1"\" bitsize=\"64\" type=\"int\"/>" 38d9657570SVincent Chen "<reg name=\""DBG_REG_A2"\" bitsize=\"64\" type=\"int\"/>" 39d9657570SVincent Chen "<reg name=\""DBG_REG_A3"\" bitsize=\"64\" type=\"int\"/>" 40d9657570SVincent Chen "<reg name=\""DBG_REG_A4"\" bitsize=\"64\" type=\"int\"/>" 41d9657570SVincent Chen "<reg name=\""DBG_REG_A5"\" bitsize=\"64\" type=\"int\"/>" 42d9657570SVincent Chen "<reg name=\""DBG_REG_A6"\" bitsize=\"64\" type=\"int\"/>" 43d9657570SVincent Chen "<reg name=\""DBG_REG_A7"\" bitsize=\"64\" type=\"int\"/>" 44d9657570SVincent Chen "<reg name=\""DBG_REG_S2"\" bitsize=\"64\" type=\"int\"/>" 45d9657570SVincent Chen "<reg name=\""DBG_REG_S3"\" bitsize=\"64\" type=\"int\"/>" 46d9657570SVincent Chen "<reg name=\""DBG_REG_S4"\" bitsize=\"64\" type=\"int\"/>" 47d9657570SVincent Chen "<reg name=\""DBG_REG_S5"\" bitsize=\"64\" type=\"int\"/>" 48d9657570SVincent Chen "<reg name=\""DBG_REG_S6"\" bitsize=\"64\" type=\"int\"/>" 49d9657570SVincent Chen "<reg name=\""DBG_REG_S7"\" bitsize=\"64\" type=\"int\"/>" 50d9657570SVincent Chen "<reg name=\""DBG_REG_S8"\" bitsize=\"64\" type=\"int\"/>" 51d9657570SVincent Chen "<reg name=\""DBG_REG_S9"\" bitsize=\"64\" type=\"int\"/>" 52d9657570SVincent Chen "<reg name=\""DBG_REG_S10"\" bitsize=\"64\" type=\"int\"/>" 53d9657570SVincent Chen "<reg name=\""DBG_REG_S11"\" bitsize=\"64\" type=\"int\"/>" 54d9657570SVincent Chen "<reg name=\""DBG_REG_T3"\" bitsize=\"64\" type=\"int\"/>" 55d9657570SVincent Chen "<reg name=\""DBG_REG_T4"\" bitsize=\"64\" type=\"int\"/>" 56d9657570SVincent Chen "<reg name=\""DBG_REG_T5"\" bitsize=\"64\" type=\"int\"/>" 57d9657570SVincent Chen "<reg name=\""DBG_REG_T6"\" bitsize=\"64\" type=\"int\"/>" 58d9657570SVincent Chen "<reg name=\""DBG_REG_EPC"\" bitsize=\"64\" type=\"code_ptr\"/>" 59d9657570SVincent Chen "<reg name=\""DBG_REG_STATUS"\" bitsize=\"64\" type=\"int\"/>" 60d9657570SVincent Chen "<reg name=\""DBG_REG_BADADDR"\" bitsize=\"64\" type=\"int\"/>" 61d9657570SVincent Chen "<reg name=\""DBG_REG_CAUSE"\" bitsize=\"64\" type=\"int\"/>" 62d9657570SVincent Chen "</feature>"; 63d9657570SVincent Chen #else 64d9657570SVincent Chen static const char gdb_xfer_read_cpuxml[39] = 65d9657570SVincent Chen "qXfer:features:read:riscv-32bit-cpu.xml"; 66d9657570SVincent Chen 67d9657570SVincent Chen static const char riscv_gdb_stub_target_desc[256] = 68d9657570SVincent Chen "l<?xml version=\"1.0\"?>" 69d9657570SVincent Chen "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">" 70d9657570SVincent Chen "<target>" 71d9657570SVincent Chen "<xi:include href=\"riscv-32bit-cpu.xml\"/>" 72d9657570SVincent Chen "</target>"; 73d9657570SVincent Chen 74d9657570SVincent Chen static const char riscv_gdb_stub_cpuxml[2048] = 75d9657570SVincent Chen "l<?xml version=\"1.0\"?>" 76d9657570SVincent Chen "<!DOCTYPE feature SYSTEM \"gdb-target.dtd\">" 77d9657570SVincent Chen "<feature name=\"org.gnu.gdb.riscv.cpu\">" 78d9657570SVincent Chen "<reg name=\""DBG_REG_ZERO"\" bitsize=\"32\" type=\"int\" regnum=\"0\"/>" 79d9657570SVincent Chen "<reg name=\""DBG_REG_RA"\" bitsize=\"32\" type=\"code_ptr\"/>" 80d9657570SVincent Chen "<reg name=\""DBG_REG_SP"\" bitsize=\"32\" type=\"data_ptr\"/>" 81d9657570SVincent Chen "<reg name=\""DBG_REG_GP"\" bitsize=\"32\" type=\"data_ptr\"/>" 82d9657570SVincent Chen "<reg name=\""DBG_REG_TP"\" bitsize=\"32\" type=\"data_ptr\"/>" 83d9657570SVincent Chen "<reg name=\""DBG_REG_T0"\" bitsize=\"32\" type=\"int\"/>" 84d9657570SVincent Chen "<reg name=\""DBG_REG_T1"\" bitsize=\"32\" type=\"int\"/>" 85d9657570SVincent Chen "<reg name=\""DBG_REG_T2"\" bitsize=\"32\" type=\"int\"/>" 86d9657570SVincent Chen "<reg name=\""DBG_REG_FP"\" bitsize=\"32\" type=\"data_ptr\"/>" 87d9657570SVincent Chen "<reg name=\""DBG_REG_S1"\" bitsize=\"32\" type=\"int\"/>" 88d9657570SVincent Chen "<reg name=\""DBG_REG_A0"\" bitsize=\"32\" type=\"int\"/>" 89d9657570SVincent Chen "<reg name=\""DBG_REG_A1"\" bitsize=\"32\" type=\"int\"/>" 90d9657570SVincent Chen "<reg name=\""DBG_REG_A2"\" bitsize=\"32\" type=\"int\"/>" 91d9657570SVincent Chen "<reg name=\""DBG_REG_A3"\" bitsize=\"32\" type=\"int\"/>" 92d9657570SVincent Chen "<reg name=\""DBG_REG_A4"\" bitsize=\"32\" type=\"int\"/>" 93d9657570SVincent Chen "<reg name=\""DBG_REG_A5"\" bitsize=\"32\" type=\"int\"/>" 94d9657570SVincent Chen "<reg name=\""DBG_REG_A6"\" bitsize=\"32\" type=\"int\"/>" 95d9657570SVincent Chen "<reg name=\""DBG_REG_A7"\" bitsize=\"32\" type=\"int\"/>" 96d9657570SVincent Chen "<reg name=\""DBG_REG_S2"\" bitsize=\"32\" type=\"int\"/>" 97d9657570SVincent Chen "<reg name=\""DBG_REG_S3"\" bitsize=\"32\" type=\"int\"/>" 98d9657570SVincent Chen "<reg name=\""DBG_REG_S4"\" bitsize=\"32\" type=\"int\"/>" 99d9657570SVincent Chen "<reg name=\""DBG_REG_S5"\" bitsize=\"32\" type=\"int\"/>" 100d9657570SVincent Chen "<reg name=\""DBG_REG_S6"\" bitsize=\"32\" type=\"int\"/>" 101d9657570SVincent Chen "<reg name=\""DBG_REG_S7"\" bitsize=\"32\" type=\"int\"/>" 102d9657570SVincent Chen "<reg name=\""DBG_REG_S8"\" bitsize=\"32\" type=\"int\"/>" 103d9657570SVincent Chen "<reg name=\""DBG_REG_S9"\" bitsize=\"32\" type=\"int\"/>" 104d9657570SVincent Chen "<reg name=\""DBG_REG_S10"\" bitsize=\"32\" type=\"int\"/>" 105d9657570SVincent Chen "<reg name=\""DBG_REG_S11"\" bitsize=\"32\" type=\"int\"/>" 106d9657570SVincent Chen "<reg name=\""DBG_REG_T3"\" bitsize=\"32\" type=\"int\"/>" 107d9657570SVincent Chen "<reg name=\""DBG_REG_T4"\" bitsize=\"32\" type=\"int\"/>" 108d9657570SVincent Chen "<reg name=\""DBG_REG_T5"\" bitsize=\"32\" type=\"int\"/>" 109d9657570SVincent Chen "<reg name=\""DBG_REG_T6"\" bitsize=\"32\" type=\"int\"/>" 110d9657570SVincent Chen "<reg name=\""DBG_REG_EPC"\" bitsize=\"32\" type=\"code_ptr\"/>" 111d9657570SVincent Chen "<reg name=\""DBG_REG_STATUS"\" bitsize=\"32\" type=\"int\"/>" 112d9657570SVincent Chen "<reg name=\""DBG_REG_BADADDR"\" bitsize=\"32\" type=\"int\"/>" 113d9657570SVincent Chen "<reg name=\""DBG_REG_CAUSE"\" bitsize=\"32\" type=\"int\"/>" 114d9657570SVincent Chen "</feature>"; 115d9657570SVincent Chen #endif 116d9657570SVincent Chen #endif 117