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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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/linux/drivers/clk/sunxi/
H A Dclk-factors.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Adjustable factor-based clock implementation
8 #include <linux/clk-provider.h>
16 #include "clk-factors.h"
19 * DOC: basic adjustable factor-based clock
22 * prepare - clk_prepare only ensures that parents are prepared
23 * enable - clk_enable only ensures that parents are enabled
24 * rate - rate is adjustable.
25 * clk->rate = (parent->rate * N * (K + 1) >> P) / (M + 1)
26 * parent - fixed parent. No clk_set_parent support
[all …]
H A Dclk-sunxi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
19 #include "clk-factors.h"
27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1
38 div = req->rate / 6000000; in sun4i_get_pll1_factors()
39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
42 req->m = 0; in sun4i_get_pll1_factors()
45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors()
46 req->rate == 54000000) in sun4i_get_pll1_factors()
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/linux/arch/arm/boot/dts/microchip/
H A Dat91-tse850-3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
9 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
11 #include "at91-linea.dtsi"
14 model = "Axentia TSE-850 3.0";
19 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
23 clock-output-names = "sck";
[all …]
/linux/Documentation/networking/caif/
H A Dlinux_caif.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| ST-Ericsson AB 2010
17 CAIF is a MUX protocol used by ST-Ericsson cellular modems for
19 channels, initiate GPRS Data connections, Video channels and Utility Channels.
22 ST-Ericsson modems support a number of transports between modem
39 ! +------+ +------+
40 ! +------+! +------+!
42 +-------> !interf!+ ! API !+ <- CAIF Client APIs
43 ! +------+ +------!
45 ! +-----------+
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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_mux_codec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
12 /* Test the link power state and send a MUX command in blocking mode. */
16 struct iosm_mux *ipc_mux = ipc_imem->mux; in ipc_mux_tq_cmd_send()
19 skb_queue_tail(&ipc_mux->channel->ul_list, acb->skb); in ipc_mux_tq_cmd_send()
20 ipc_imem_ul_send(ipc_mux->imem); in ipc_mux_tq_cmd_send()
27 struct completion *completion = &ipc_mux->channel->ul_sem; in ipc_mux_acb_send()
28 int ret = ipc_task_queue_send_task(ipc_mux->imem, ipc_mux_tq_cmd_send, in ipc_mux_acb_send()
29 0, &ipc_mux->acb, in ipc_mux_acb_send()
30 sizeof(ipc_mux->acb), false); in ipc_mux_acb_send()
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H A Diosm_ipc_imem_ops.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
15 /* Open a packet data online channel between the network layer and CP. */
18 dev_dbg(ipc_imem->dev, "%s if id: %d", in ipc_imem_sys_wwan_open()
19 ipc_imem_phase_get_string(ipc_imem->phase), if_id); in ipc_imem_sys_wwan_open()
23 dev_err(ipc_imem->dev, "net:%d : refused phase %s", if_id, in ipc_imem_sys_wwan_open()
24 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_open()
25 return -EIO; in ipc_imem_sys_wwan_open()
28 return ipc_mux_open_session(ipc_imem->mux, if_id); in ipc_imem_sys_wwan_open()
35 if (ipc_imem->mux && if_id >= IP_MUX_SESSION_START && in ipc_imem_sys_wwan_close()
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/linux/drivers/extcon/
H A Dextcon-intel-int3496.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/devm-helpers.h>
15 #include <linux/extcon-provider.h>
53 { "id-gpios", &id_gpios, 1, ACPI_GPIO_QUIRK_NO_IO_RESTRICTION },
54 { "vbus-gpios", &vbus_gpios, 1 },
55 { "mux-gpios", &mux_gpios, 1 },
59 static void int3496_set_vbus_boost(struct int3496_data *data, bool enable) in int3496_set_vbus_boost() argument
63 if (IS_ERR_OR_NULL(data->vbus_boost)) in int3496_set_vbus_boost()
66 if (data->vbus_boost_enabled == enable) in int3496_set_vbus_boost()
70 ret = regulator_enable(data->vbus_boost); in int3496_set_vbus_boost()
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/linux/drivers/phy/ti/
H A Dphy-j721e-wiz.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
13 #include <linux/clk-provider.h>
19 #include <linux/mux/consumer.h>
25 #include <linux/reset-controller.h>
44 /* To include mux clocks, divider clocks and gate clocks */
125 [TI_WIZ_PLL0_REFCLK] = "pll0-refclk",
126 [TI_WIZ_PLL1_REFCLK] = "pll1-refclk",
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/linux/fs/ecryptfs/
H A Dmiscdev.c1 // SPDX-License-Identifier: GPL-2.0-only
31 struct ecryptfs_daemon *daemon = file->private_data; in ecryptfs_miscdev_poll()
34 mutex_lock(&daemon->mux); in ecryptfs_miscdev_poll()
35 if (daemon->flags & ECRYPTFS_DAEMON_ZOMBIE) { in ecryptfs_miscdev_poll()
40 if (daemon->flags & ECRYPTFS_DAEMON_IN_READ) in ecryptfs_miscdev_poll()
42 if (daemon->flags & ECRYPTFS_DAEMON_IN_POLL) in ecryptfs_miscdev_poll()
44 daemon->flags |= ECRYPTFS_DAEMON_IN_POLL; in ecryptfs_miscdev_poll()
45 mutex_unlock(&daemon->mux); in ecryptfs_miscdev_poll()
46 poll_wait(file, &daemon->wait, pt); in ecryptfs_miscdev_poll()
47 mutex_lock(&daemon->mux); in ecryptfs_miscdev_poll()
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/linux/Documentation/ABI/testing/
H A Dsysfs-class-net-qmi9 framing from '802.3' to 'raw-ip'.
15 netdev is a headerless p-t-p device in 'raw-ip' mode,
23 firmware is configured for 'raw-ip' mode.
32 Write a number ranging from 1 to 254 to add a qmap mux
39 activation and data stream setup on the modem side by
50 created qmap mux based network device.
59 Indicates the mux id associated to the qmimux network interface
69 Set this to 'Y' to enable 'pass-through' mode, allowing packets
75 'Pass-through' mode can be enabled when the device is in
76 'raw-ip' mode only.
/linux/arch/arm/boot/dts/ti/omap/
H A Domap-zoom-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include "omap-gpmc-smsc911x.dtsi"
15 * REVISIT: Add timing support from slls644g.pdf
20 bank-width = <2>;
21 reg-shift = <1>;
22 reg-io-width = <1>;
23 interrupt-parent = <&gpio4>;
25 clock-frequency = <1843200>;
26 current-speed = <115200>;
27 gpmc,mux-add-data = <0>;
[all …]
H A Domap-gpmc-smsc9221.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 vddvario: regulator-vddvario {
15 compatible = "regulator-fixed";
16 regulator-name = "vddvario";
17 regulator-always-on;
20 vdd33a: regulator-vdd33a {
21 compatible = "regulator-fixed";
22 regulator-name = "vdd33a";
23 regulator-always-on;
30 bank-width = <2>;
[all …]
H A Domap3-overo-tobiduo-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "omap3-overo-common-peripherals.dtsi"
12 #include "omap-gpmc-smsc9221.dtsi"
17 interrupt-parent = <&gpio6>;
23 bank-width = <2>;
25 gpmc,mux-add-data = <0>;
26 gpmc,cs-on-ns = <0>;
27 gpmc,cs-rd-off-ns = <42>;
28 gpmc,cs-wr-off-ns = <36>;
29 gpmc,adv-on-ns = <6>;
[all …]
H A Domap2430-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap2430-sdp", "ti,omap2430", "ti,omap2";
20 clock-frequency = <100000>;
31 vmmc-supply = <&vmmc1>;
32 bus-width = <4>;
39 interrupt-parent = <&gpio5>;
42 bank-width = <2>;
43 gpmc,sync-clk-ps = <0>;
[all …]
H A Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
21 /* data lines, gpmc_d0..d7 not muxable according to TRM */
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtmips.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/pinctrl/pinconf-generic.h>
19 #include <asm/mach-ralink/ralink_regs.h>
20 #include <asm/mach-ralink/mt7620.h>
22 #include "pinctrl-mtmips.h"
24 #include "../pinctrl-utils.h"
50 return p->group_count; in mtmips_get_group_count()
58 return (group >= p->group_count) ? NULL : p->group_names[group]; in mtmips_get_group_name()
68 if (group >= p->group_count) in mtmips_get_group_pins()
69 return -EINVAL; in mtmips_get_group_pins()
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/linux/include/linux/
H A Ddio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Maybe this should handle DIO-II later?
19 * range from 0-63 (DIO) and 132-255 (DIO-II).
22 * So DIO cards cover [0x600000-0x800000); the areas [0x200000-0x400000) and
23 * [0x800000-0x1000000) are for additional space required by things
24 * like framebuffers. [0x400000-0x600000) is for miscellaneous internal I/O.
27 * DIO-II boards are at 0x1000000 + (sc - 132) * 0x400000
28 * which is address range [0x1000000-0x20000000) -- too big to map completely,
29 * so currently we just don't handle DIO-II boards. It wouldn't be hard to
79 unsigned long driver_data; /* Data private to the driver */
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring_mux.c43 static inline struct amdgpu_mux_entry *amdgpu_ring_mux_sw_entry(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_sw_entry() argument
46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry()
47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry()
51 static void amdgpu_ring_mux_copy_pkt_from_sw_ring(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument
56 struct amdgpu_ring *real_ring = mux->real_ring; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
58 start = s_start & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
59 end = s_end & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
62 DRM_ERROR("no more data copied from sw ring\n"); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
66 amdgpu_ring_alloc(real_ring, (ring->ring_size >> 2) + end - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
67 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[start], in amdgpu_ring_mux_copy_pkt_from_sw_ring()
[all …]
/linux/drivers/clk/sifive/
H A Dsifive-prci.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "sifive-prci.h"
12 #include "fu540-prci.h"
13 #include "fu740-prci.h"
20 * __prci_readl() - read from a PRCI register
34 return readl_relaxed(pd->va + offs); in __prci_readl()
39 writel_relaxed(v, pd->va + offs); in __prci_writel()
42 /* WRPLL-related private functions */
45 * __prci_wrpll_unpack() - unpack WRPLL configuration registers into parameters
64 c->divr = v; in __prci_wrpll_unpack()
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/linux/sound/soc/codecs/
H A Dak4118.c1 // SPDX-License-Identifier: GPL-2.0
3 * ak4118.c -- Asahi Kasei ALSA Soc Audio driver
137 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
142 {"Input Mux", "RX0", "INRX0"},
143 {"Input Mux", "RX1", "INRX1"},
144 {"Input Mux", "RX2", "INRX2"},
145 {"Input Mux", "RX3", "INRX3"},
146 {"Input Mux", "RX4", "INRX4"},
147 {"Input Mux", "RX5", "INRX5"},
148 {"Input Mux", "RX6", "INRX6"},
[all …]
/linux/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
33 #include <linux/omap-gpmc.h>
37 #include <linux/platform_data/mtd-nand-omap2.h>
39 #define DEVICE_NAME "omap-gpmc"
250 struct resource *data; member
258 /* Define chip-selects as reserved by default until probe completes */
294 /* TODO: Add support for gpmc_fck to clock framework and use it */
306 * gpmc_get_clk_period - get period of selected clock domain in ps
[all …]
/linux/drivers/clk/qcom/
H A Dapcs-msm8916.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
17 #include "clk-regmap.h"
18 #include "clk-regmap-mux-div.h"
29 * (mux and divider), while the A53 PLL is reconfigured.
32 void *data) in a53cc_notifier_cb() argument
39 /* set the mux and divider to safe frequency (400mhz) */ in a53cc_notifier_cb()
47 struct device *dev = &pdev->dev; in qcom_apcs_msm8916_clk_probe()
48 struct device *parent = dev->parent; in qcom_apcs_msm8916_clk_probe()
49 struct device_node *np = parent->of_node; in qcom_apcs_msm8916_clk_probe()
[all …]
H A Dapcs-sdx55.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
19 #include "clk-regmap.h"
20 #include "clk-regmap-mux-div.h"
32 * (mux and divider), while the A7 PLL is reconfigured.
35 void *data) in a7cc_notifier_cb() argument
42 /* set the mux and divider to safe frequency (400mhz) */ in a7cc_notifier_cb()
50 struct device *dev = &pdev->dev; in qcom_apcs_sdx55_clk_probe()
51 struct device *parent = dev->parent; in qcom_apcs_sdx55_clk_probe()
61 return -ENODEV; in qcom_apcs_sdx55_clk_probe()
[all …]
/linux/drivers/spi/
H A Dspi-meson-spicc.c7 * SPDX-License-Identifier: GPL-2.0+
12 #include <linux/clk-provider.h>
24 #include <linux/dma-mapping.h>
27 * There are two modes for data transmission: PIO and DMA.
28 * When bits_per_word is 8, 16, 24, or 32, data is transferred using PIO mode.
40 * - 64 bits per word
41 * - The transfer length in word must be multiples of the dma_burst_len, and
77 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */
80 #define SPICC_RH_EN BIT(4) /* RX FIFO Half-Full Interrupt */
97 #define SPICC_TH BIT(1) /* TX FIFO Half-Full Interrupt */
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