Lines Matching +full:mux +full:- +full:add +full:- +full:data

1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
19 #include "clk-regmap.h"
20 #include "clk-regmap-mux-div.h"
32  * (mux and divider), while the A7 PLL is reconfigured.
35 			    void *data)  in a7cc_notifier_cb()  argument
42 		/* set the mux and divider to safe frequency (400mhz) */  in a7cc_notifier_cb()
50 	struct device *dev = &pdev->dev;  in qcom_apcs_sdx55_clk_probe()
51 	struct device *parent = dev->parent;  in qcom_apcs_sdx55_clk_probe()
61 		return -ENODEV;  in qcom_apcs_sdx55_clk_probe()
66 		return -ENOMEM;  in qcom_apcs_sdx55_clk_probe()
73 	a7cc->clkr.hw.init = &init;  in qcom_apcs_sdx55_clk_probe()
74 	a7cc->clkr.regmap = regmap;  in qcom_apcs_sdx55_clk_probe()
75 	a7cc->reg_offset = 0x8;  in qcom_apcs_sdx55_clk_probe()
76 	a7cc->hid_width = 5;  in qcom_apcs_sdx55_clk_probe()
77 	a7cc->hid_shift = 0;  in qcom_apcs_sdx55_clk_probe()
78 	a7cc->src_width = 3;  in qcom_apcs_sdx55_clk_probe()
79 	a7cc->src_shift = 8;  in qcom_apcs_sdx55_clk_probe()
80 	a7cc->parent_map = apcs_mux_clk_parent_map;  in qcom_apcs_sdx55_clk_probe()
82 	a7cc->pclk = devm_clk_get(parent, "pll");  in qcom_apcs_sdx55_clk_probe()
83 	if (IS_ERR(a7cc->pclk))  in qcom_apcs_sdx55_clk_probe()
84 		return dev_err_probe(dev, PTR_ERR(a7cc->pclk),  in qcom_apcs_sdx55_clk_probe()
87 	a7cc->clk_nb.notifier_call = a7cc_notifier_cb;  in qcom_apcs_sdx55_clk_probe()
88 	ret = clk_notifier_register(a7cc->pclk, &a7cc->clk_nb);  in qcom_apcs_sdx55_clk_probe()
93 	ret = devm_clk_register_regmap(dev, &a7cc->clkr);  in qcom_apcs_sdx55_clk_probe()
100 					  &a7cc->clkr.hw);  in qcom_apcs_sdx55_clk_probe()
102 		dev_err_probe(dev, ret, "Failed to add clock provider\n");  in qcom_apcs_sdx55_clk_probe()
123 	clk_notifier_unregister(a7cc->pclk, &a7cc->clk_nb);  in qcom_apcs_sdx55_clk_probe()
132 	clk_notifier_unregister(a7cc->pclk, &a7cc->clk_nb);  in qcom_apcs_sdx55_clk_remove()
140 		.name = "qcom-sdx55-acps-clk",