multiple\-channel (full) in projects: linux

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched +full:multiple +full:- +full:channel (Results 1 – 25 of 864) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...35

/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A D	uncore-memory.json	8 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 12 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 30 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 57 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read… 66 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Writ… 79 "PublicDescription": "Uncore Fixed Counter - uclks", 117 …channel. This counter is only useful with ECC DRAM devices. This count will increment one time f… 126 …a major mode (selected by a filter) on the given channel. Major modea are channel-wide, and not … 136 …a major mode (selected by a filter) on the given channel. Major modea are channel-wide, and not … 146 …a major mode (selected by a filter) on the given channel. Major modea are channel-wide, and not … [all …]
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A D	uncore-memory.json	8 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 18 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 28 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 60 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 65 … RD_CAS and WR_CAS Commands; Counts the total number of DRAM CAS commands issued on this channel.", 75 …mmands; Counts the total number of DRAM Read CAS commands issued on this channel (including underf… 80 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 85 …mmands; Counts the total number or DRAM Read CAS commands issued on this channel. This includes b… 123 …S and WR_CAS Commands; Counts the total number of DRAM Write CAS commands issued on this channel.", 128 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read… [all …]
/linux/Documentation/trace/
H A D	stm.rst	1 .. SPDX-License-Identifier: GPL-2.0 9 protocol multiplexing data from multiple trace sources, each one of 10 which is assigned a unique pair of master and channel. While some of 14 master/channel combination from this pool. 17 sources can only be identified by master/channel combination, so in 19 involves multiple trace sources, it needs to be able to map those 20 master/channel pairs to the trace sources that it understands. 23 master 7 channel 15, while arbitrary user applications can use masters 34 associated with it, located in "stp-policy" subsystem directory in 40 $ ls /config/stp-policy/dummy_stm.my-policy/user [all …]
/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A D	jedec,lpddr-channel.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: LPDDR channel with chip/rank topology description 10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS, 16 - Julius Werner <jwerner@chromium.org> 21 - jedec,lpddr2-channel 22 - jedec,lpddr3-channel 23 - jedec,lpddr4-channel [all …]`
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	uncore-memory.json	8 …ts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this channel. This … 19 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.", 30 …All Activates : Counts the number of DRAM Activate commands sent on this channel. Activate comman… 41 …due to Bypass : Counts the number of DRAM Activate commands sent on this channel. Activate comman… 51 "PublicDescription": "Counts the total number of DRAM CAS commands issued on this channel.", 61 …ts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issued on this channel. This … 66 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre", 72 …_CAS commands w/auto-pre : DRAM RD_CAS and WR_CAS Commands : Counts the total number or DRAM Read … 94 …tion": "Counts the total number of DRAM Read CAS commands issued on this channel. This includes b… 115 …"Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-pre, on this channel.", [all …]
/linux/Documentation/trace/coresight/
H A D	coresight-ect.rst	`1 .. SPDX-License-Identifier: GPL-2.0 11 -------------------- 21 0 C 0----------->: : +======>(other CTI channel IO) 22 0 P 0<-----------: : v 24 0000000 : CTI :<=========>CTM<====>: CTI :---+ 25 ####### in_trigs : : (id 0-3) ***** ::::::: v 26 # ETM #----------->: : ^ ####### 27 # #<-----------: : +---# ETR # 31 channels. When an input trigger becomes active, the attached channel will 32 become active. Any output trigger attached to that channel will also [all …]`
/linux/Documentation/devicetree/bindings/sound/
H A D	fsl,rpmsg.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 Linux side is a device which provides audio service by rpmsg channel. 18 Cortex-A and Cortex-M. 21 - $ref: sound-card-common.yaml# 26 - fsl,imx7ulp-rpmsg-audio 27 - fsl,imx8mn-rpmsg-audio 28 - fsl,imx8mm-rpmsg-audio [all …]`
H A D	samsung-i2s.yaml	`1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 14 - $ref: dai-common.yaml# 19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. 21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with 25 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for [all …]`
/linux/include/uapi/linux/caif/
H A D	caif_socket.h	1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note / 4 Copyright (C) ST-Ericsson AB 2010 16 * enum caif_link_selector - Physical Link Selection. 17 * @CAIF_LINK_HIGH_BANDW: Physical interface for high-bandwidth 19 * @CAIF_LINK_LOW_LATENCY: Physical interface for low-latency 24 * setting up CAIF Channels when multiple CAIF Link Layers exists. 32 * enum caif_channel_priority - CAIF channel priorities. 34 * @CAIF_PRIO_MIN: Min priority for a channel. 35 * @CAIF_PRIO_LOW: Low-priority channel. 38 * @CAIF_PRIO_MAX: Max priority for channel [all …]
/linux/Documentation/hid/
H A D	uhid.rst	2 UHID - User-space I/O driver support for HID subsystem 5 UHID allows user-space to implement HID transport drivers. Please see 6 hid-transport.rst for an introduction into HID transport drivers. This document 9 With UHID, a user-space transport driver can create kernel hid-devices for each 10 device connected to the user-space controlled bus. The UHID API defines the I/O 11 events provided from the kernel to user-space and vice versa. 13 There is an example user-space application in ./samples/uhid/uhid-example.c 16 ------------ 18 UHID is accessed through a character misc-device. The minor number is allocated 25 write()'ing "struct uhid_event" objects. Non-blocking operations are supported [all …]
/linux/drivers/remoteproc/
H A D	pru_rproc.h	1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) / 5 Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/ 6 * Suman Anna <s-anna@ti.com> 13 * struct pruss_int_map - PRU system events _to_ channel and host mapping 15 * @chnl: channel number assigned to a given @event 19 * to host interrupts. Events can be mapped to channels in a one-to-one or 20 * many-to-one ratio (multiple events per channel), and channels can be 21 * mapped to host interrupts in a one-to-one or many-to-one ratio (multiple 31 * struct pru_irq_rsc - PRU firmware section header for IRQ data
/linux/Documentation/devicetree/bindings/spi/
H A D	sprd,spi-adi.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Orson Zhai <orsonzhai@gmail.com> 11 - Baolin Wang <baolin.wang7@gmail.com> 12 - Chunyan Zhang <zhang.lyra@gmail.com> 15 ADI is the abbreviation of Anolog-Digital interface, which is used to access 24 which means we can just link one analog chip address to one hardware channel, 25 then users can access the mapped analog chip address by this hardware channel [all …]
/linux/drivers/comedi/drivers/
H A D	ni_labpc.c	1 // SPDX-License-Identifier: GPL-2.0+ 4 * Driver for National Instruments Lab-PC series boards and compatibles 5 * Copyright (C) 2001-2003 Frank Mori Hess <fmhess@users.sourceforge.net> 10 * Description: National Instruments Lab-PC (& compatibles) 11 * Devices: [National Instruments] Lab-PC-1200 (lab-pc-1200), 12 * Lab-PC-1200AI (lab-pc-1200ai), Lab-PC+ (lab-pc+) 16 * Configuration options - ISA boards: 17 * [0] - I/O port base address 18 * [1] - IRQ (optional, required for timed or externally triggered 20 * [2] - DMA channel (optional) [all …]
H A D	comedi_bond.c	1 // SPDX-License-Identifier: GPL-2.0+ 4 * A Comedi driver to 'bond' or merge multiple drivers and devices as one. 6 * COMEDI - Linux Control and Measurement Device Interface 13 * Description: A driver to 'bond' (merge) multiple subdevices from multiple 17 * Updated: Mon, 10 Oct 00:18:25 -0500 20 * This driver allows you to 'bond' (merge) multiple comedi subdevices 26 * different subdevices in the application -- you just worry about 27 * indexing one linear array of channel id's. 33 * Commands aren't supported -- although it would be cool if they were. 36 * List of comedi-minors to bond. All subdevices of the same type [all …]
H A D	ni_labpc_cs.c	1 // SPDX-License-Identifier: GPL-2.0+ 3 * Driver for National Instruments daqcard-1200 boards 15 * Description: National Instruments Lab-PC (& compatibles) 17 * Devices: [National Instruments] DAQCard-1200 (daqcard-1200) 21 * helping to debug daqcard-1200 support. 31 * The daqcard-1200 has quirky chanlist requirements when scanning multiple 32 * channels. Multiple channel scan sequence must start at highest channel, 33 * then decrement down to channel 0. Chanlists consisting of all one channel 37 * 340988a (daqcard-1200) 47 .name = "daqcard-1200", [all …]
/linux/Documentation/driver-api/
H A D	slimbus.rst	9 ---------------- 12 configuration, and is a 2-wire multi-drop implementation (clock, and data). 15 (System-on-Chip) and peripheral components (typically codec). SLIMbus uses 16 Time-Division-Multiplexing to accommodate multiple data channels, and 17 a control channel. 19 The control channel is used for various control functions such as bus 21 reading/writing device specific values), or multicast (e.g. data channel 24 A data channel is used for data-transfer between 2 SLIMbus devices. Data 25 channel uses dedicated ports on the device. 28 --------------------- [all …]
/linux/Documentation/admin-guide/perf/
H A D	hisi-pmu.rst	10 The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster 13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively. 16 ------------------------------- 28 name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>. 29 where "sccl-id" is the identifier of the SCCL and "index-id" is the index of 48 ------------------------------------------ 50 ------------------------------------------ 52 ------------------------------------------ 54 ------------------------------------------ 56 $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5 [all …]
/linux/Documentation/hwmon/
H A D	max16065.rst	`11 Addresses scanned: - 15 http://datasheets.maxim-ic.com/en/ds/MAX16065-MAX16066.pdf 21 Addresses scanned: - 25 http://datasheets.maxim-ic.com/en/ds/MAX16067.pdf 31 Addresses scanned: - 35 http://datasheets.maxim-ic.com/en/ds/MAX16068.pdf 41 Addresses scanned: - 45 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf 47 Author: Guenter Roeck <linux@roeck-us.net> 51 ----------- [all …]`
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	uncore-memory.json	8 "PublicDescription": "DRAM RD_CAS and WR_CAS Commands; Counts the total number of DRAM Read CAS commands issued on this channel (including underfills).", 19 "PublicDescription": "DRAM RD_CAS and WR_CAS Commands; Counts the total number of DRAM Write CAS commands issued on this channel.", 30 "PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS. One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.", 40 "PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS. One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.", 50 "PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS. One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.", 82 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 87 "PublicDescription": "DRAM RD_CAS and WR_CAS Commands; Counts the total number of DRAM CAS commands issued on this channel.", 97 "PublicDescription": "DRAM RD_CAS and WR_CAS Commands; Counts the total number of DRAM Read CAS commands issued on this channel (including underfills).", 102 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 107 "PublicDescription": "DRAM RD_CAS and WR_CAS Commands; Counts the total number or DRAM Read CAS commands issued on this channel [all...]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	uncore-memory.json	8 …mmands; Counts the total number of DRAM Read CAS commands issued on this channel (including underf… 19 …S and WR_CAS Commands; Counts the total number of DRAM Write CAS commands issued on this channel.", 30 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 40 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 50 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 82 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 87 … RD_CAS and WR_CAS Commands; Counts the total number of DRAM CAS commands issued on this channel.", 97 …mmands; Counts the total number of DRAM Read CAS commands issued on this channel (including underf… 102 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 107 …mmands; Counts the total number or DRAM Read CAS commands issued on this channel. This includes b… [all …]
/linux/include/sound/sof/
H A D	channel_map.h	1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) / 16 \brief Channel map, specifies transformation of one-to-many or many-to-one. 18 * In case of one-to-many specifies how the output channels are computed out of 19 * a single source channel, 20 * in case of many-to-one specifies how a single target channel is computed 23 * Channel index specifies position of the channel in the stream on the 'one' 29 * Channel mask describes which channels are taken into account on the "many" 30 * side. Bit[i] set to 1 means that i-th channel is used for computation 33 * Channel mask is followed by array of coefficients in Q2.30 format, 34 * one per each channel set in the mask (left to right, LS bit set in the [all …]
/linux/Documentation/devicetree/bindings/display/
H A D	mipi-dsi-bus.txt	8 This document describes DSI bus-specific properties only or defines existing 25 - #address-cells: The number of cells required to represent an address on the 26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so 29 - #size-cells: Should be 0. There are cases where it makes sense to use a 33 - clock-master: boolean. Should be enabled if the host is being used in 43 ------------------------------------------------------ 49 device-specific properties. 52 - reg: The virtual channel number of a DSI peripheral. Must be in the range 55 Some DSI peripherals respond to more than a single virtual channel. In that 57 - The reg property can take multiple entries, one for each virtual channel [all …]
/linux/Documentation/driver-api/dmaengine/
H A D	dmatest.rst	15 The dmatest module can be configured to test a specific channel. It can also 16 test multiple channels at the same time, and it can start multiple threads 17 competing for the same channel. 21 capability of the following: DMA_MEMCPY (memory-to-memory), DMA_MEMSET 22 (const-to-memory or memory-to-memory, when emulated), DMA_XOR, DMA_PQ. 28 Part 1 - How to build the test module 33 Device Drivers -> DMA Engine support -> DMA Test client 38 Part 2 - When dmatest is built as a module 43 % modprobe dmatest timeout=2000 iterations=1 channel=dma0chan0 run=1 50 % echo dma0chan0 > /sys/module/dmatest/parameters/channel [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	uncore-memory.json	8 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 18 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 28 …"PublicDescription": "Counts the number of DRAM Activate commands sent on this channel. Activate … 60 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)", 65 … RD_CAS and WR_CAS Commands; Counts the total number of DRAM CAS commands issued on this channel.", 75 …mmands; Counts the total number of DRAM Read CAS commands issued on this channel (including underf… 80 … "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)", 85 …mmands; Counts the total number or DRAM Read CAS commands issued on this channel. This includes b… 123 …S and WR_CAS Commands; Counts the total number of DRAM Write CAS commands issued on this channel.", 128 …"BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read… [all …]
/linux/Documentation/mm/
H A D	multigen_lru.rst	`1 .. SPDX-License-Identifier: GPL-2.0 4 Multi-Gen LRU 6 The multi-gen LRU is an alternative LRU implementation that optimizes 14 ---------- 20 * Simple self-correcting heuristics 23 implementations. In the multi-gen LRU, each generation represents a 25 (time-based) common frame of reference and therefore help make better 41 choices; thus self-correction is necessary. 43 The benefits of simple self-correcting heuristics are self-evident. 51 ----------- [all …]`

12 3 4 5 6 7 8 9 10 >>...35