Home
last modified time | relevance | path

Searched full:mu (Results 1 – 25 of 125) sorted by relevance

12345

/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml17 The AP communicates with the SC using a multi-ported MU module found
18 in the LSIO subsystem. The current definition of this MU module provides
20 (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
21 with the LSIO DSC IP bus. The SC firmware will communicate with this MU
62 A list of phandles of TX MU channels followed by a list of phandles of
63 RX MU channels. The list may include at the end one more optional MU
65 channels is 1 TX and 1 RX channels if MU instance is "fsl,imx8-mu-scu"
66 compatible, 4 TX and 4 RX channels otherwise. All MU channels must be
67 within the same MU instance. Cross instances are not allowed. The MU
73 - description: TX0 MU channel
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qxp-ss-lsio.dtsi65 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
69 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
73 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
77 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
81 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
85 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
89 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
93 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
H A Dimx8qm-ss-lsio.dtsi78 compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu";
82 compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu";
86 compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu";
90 compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu";
94 compatible = "fsl,imx8-mu-scu", "fsl,imx8qm-mu", "fsl,imx6sx-mu";
98 compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
102 compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
106 compatible = "fsl,imx8qm-mu", "fsl,imx6sx-mu";
H A Dimx8dxl-ss-lsio.dtsi93 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
98 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
103 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
108 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
113 compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
118 compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
H A Dimx94.dtsi209 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
566 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
724 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
733 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
742 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
751 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
760 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
769 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
901 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
1061 compatible = "fsl,imx94-mu", "fsl,imx95-mu";
[all …]
H A Dimx8mm-phycore-rpmsg.dtso51 mboxes = <&mu 0 1
52 &mu 1 1
53 &mu 3 1>;
H A Dimx8-ss-vpu.dtsi16 compatible = "fsl,imx6sx-mu";
25 compatible = "fsl,imx6sx-mu";
34 compatible = "fsl,imx6sx-mu";
H A Dimx95.dtsi641 compatible = "fsl,imx95-mu";
1046 compatible = "fsl,imx95-mu";
1251 compatible = "fsl,imx95-mu";
1427 compatible = "fsl,imx95-mu";
1456 compatible = "fsl,imx95-mu";
1465 compatible = "fsl,imx95-mu";
1474 compatible = "fsl,imx95-mu";
1484 compatible = "fsl,imx95-mu-v2x";
1491 compatible = "fsl,imx95-mu-v2x";
1515 compatible = "fsl,imx95-mu-ele";
[all …]
/linux/kernel/bpf/
H A Dtnum.c64 u64 sm, sv, sigma, chi, mu; in tnum_add() local
70 mu = chi | a.mask | b.mask; in tnum_add()
71 return TNUM(sv & ~mu, mu); in tnum_add()
76 u64 dv, alpha, beta, chi, mu; in tnum_sub() local
82 mu = chi | a.mask | b.mask; in tnum_sub()
83 return TNUM(dv & ~mu, mu); in tnum_sub()
98 u64 v, mu; in tnum_or() local
101 mu = a.mask | b.mask; in tnum_or()
102 return TNUM(v, mu & ~v); in tnum_or()
107 u64 v, mu; in tnum_xor() local
[all …]
/linux/drivers/scsi/
H A Dhptiop.c142 static u64 mv_outbound_read(struct hpt_iopmu_mv __iomem *mu) in mv_outbound_read() argument
144 u32 outbound_tail = readl(&mu->outbound_tail); in mv_outbound_read()
145 u32 outbound_head = readl(&mu->outbound_head); in mv_outbound_read()
150 memcpy_fromio(&p, &mu->outbound_q[mu->outbound_tail], 8); in mv_outbound_read()
155 writel(outbound_tail, &mu->outbound_tail); in mv_outbound_read()
163 u32 inbound_head = readl(&hba->u.mv.mu->inbound_head); in mv_inbound_write()
169 memcpy_toio(&hba->u.mv.mu->inbound_q[inbound_head], &p, 8); in mv_inbound_write()
170 writel(head, &hba->u.mv.mu->inbound_head); in mv_inbound_write()
213 msg = readl(&hba->u.mv.mu->outbound_msg); in iop_intr_mv()
222 while ((tag = mv_outbound_read(hba->u.mv.mu))) in iop_intr_mv()
[all …]
/linux/drivers/irqchip/
H A Dirq-imx-mu-msi.c3 * Freescale MU used as MSI controller
137 .name = "MU",
220 .prefix = "MU-MSI-",
244 /* Register offset of different version MU IP */
358 dev_err(dev, "Failed to add device_link to mu a.\n"); in imx_mu_of_init()
369 dev_err(dev, "Failed to add device_link to mu a.\n"); in imx_mu_of_init()
438 IRQCHIP_MATCH("fsl,imx7ulp-mu-msi", imx_mu_imx7ulp_of_init)
439 IRQCHIP_MATCH("fsl,imx6sx-mu-msi", imx_mu_imx6sx_of_init)
440 IRQCHIP_MATCH("fsl,imx8ulp-mu-msi", imx_mu_imx8ulp_of_init)
445 MODULE_DESCRIPTION("Freescale MU MSI controller driver");
/linux/drivers/firmware/arm_scmi/transports/
H A Doptee.c109 * @mu: Mutex protection on channel access
124 struct mutex mu; member
141 * @mu: Mutex for protection of @channel_list
148 struct mutex mu; member
391 mutex_init(&channel->mu); in scmi_optee_chan_setup()
412 mutex_lock(&scmi_optee_private->mu); in scmi_optee_chan_setup()
414 mutex_unlock(&scmi_optee_private->mu); in scmi_optee_chan_setup()
439 mutex_lock(&scmi_optee_private->mu); in scmi_optee_chan_free()
441 mutex_unlock(&scmi_optee_private->mu); in scmi_optee_chan_free()
462 mutex_lock(&channel->mu); in scmi_optee_send_message()
[all …]
/linux/drivers/mtd/nand/raw/atmel/
H A Dpmecc.c176 s32 *mu; member
361 /* Reserve space for mu, dmu and delta. */ in atmel_pmecc_create_user()
375 user->mu = (s32 *)PTR_ALIGN(user->smu + in atmel_pmecc_create_user()
379 user->dmu = user->mu + req->ecc.strength + 1; in atmel_pmecc_create_user()
483 s32 *mu = user->mu; in atmel_pmecc_get_sigma() local
505 /* Mu */ in atmel_pmecc_get_sigma()
506 mu[0] = -1; in atmel_pmecc_get_sigma()
515 delta[0] = (mu[0] * 2 - lmu[0]) >> 1; in atmel_pmecc_get_sigma()
519 /* Mu */ in atmel_pmecc_get_sigma()
520 mu[1] = 0; in atmel_pmecc_get_sigma()
[all …]
/linux/drivers/net/wireless/ath/ath11k/
H A Ddebugfs_htt_stats.h536 /* MU MIMO stats per hwQ */
657 u32 delayed_bar_1; /* MU user 1 */
658 u32 delayed_bar_2; /* MU user 2 */
659 u32 delayed_bar_3; /* MU user 3 */
660 u32 delayed_bar_4; /* MU user 4 */
661 u32 delayed_bar_5; /* MU user 5 */
662 u32 delayed_bar_6; /* MU user 6 */
663 u32 delayed_bar_7; /* MU user 7 */
672 u32 ac_mu_mimo_brpoll_1; /* MU user 1 */
673 u32 ac_mu_mimo_brpoll_2; /* MU user 2 */
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Dbf.c67 rtw_dbg(rtwdev, RTW_DBG_BF, "mu bfer number over limit\n"); in rtw_bf_assoc()
242 rtw_dbg(rtwdev, RTW_DBG_BF, "config as an mu bfee\n"); in rtw_bf_enable_bfee_mu()
323 rtw_dbg(rtwdev, RTW_DBG_BF, "this vif is not mu bfee\n"); in rtw_bf_set_gid_table()
355 /* MU Retry Limit */ in rtw_bf_phy_init()
358 /* Disable Tx MU-MIMO until sounding done */ in rtw_bf_phy_init()
360 /* Clear validity of MU STAs */ in rtw_bf_phy_init()
364 /* MU-MIMO Option as default value */ in rtw_bf_phy_init()
369 /* MU-MIMO Control as default value */ in rtw_bf_phy_init()
371 /* Set MU NDPA rate & BW source */ in rtw_bf_phy_init()
/linux/net/mac80211/
H A Ddebugfs_sta.c632 PFLAG(MU_BEAMFORMER_CAPABLE, "MU-BEAMFORMER-CAPABLE"); in link_sta_vht_capa_read()
633 PFLAG(MU_BEAMFORMEE_CAPABLE, "MU-BEAMFORMEE-CAPABLE"); in link_sta_vht_capa_read()
760 PFLAG(MAC, 2, MU_CASCADING, "MU-CASCADING"); in link_sta_he_capa_read()
798 PFLAG(MAC, 5, OM_CTRL_UL_MU_DATA_DIS_RX, "OM-CTRL-UL-MU-DATA-DIS-RX"); in link_sta_he_capa_read()
850 PFLAG(PHY, 2, UL_MU_FULL_MU_MIMO, "UL-MU-FULL-MU-MIMO"); in link_sta_he_capa_read()
851 PFLAG(PHY, 2, UL_MU_PARTIAL_MU_MIMO, "UL-MU-PARTIAL-MU-MIMO"); in link_sta_he_capa_read()
889 "RX-PARTIAL-BW-SU-IN-20MHZ-MU"); in link_sta_he_capa_read()
893 PFLAG(PHY, 4, MU_BEAMFORMER, "MU in link_sta_he_capa_read()
[all...]
/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml50 (see mailbox/fsl,mu.yaml)
144 mboxes = <&mu 0 1
145 &mu 1 1
146 &mu 3 1>;
/linux/sound/usb/
H A Dmixer_maps.c41 USB_IN[1] --->FU[2]------------------------------+->MU[16]-->PU[17]-+->FU[18]--+->EU[27]--+->EU[21]…
43 USB_IN[3] -+->SU[5]-->FU[6]--+->MU[14] ->PU[15]->+ | | | …
70 /* 14: MU (w/o controls) */
72 /* 16: MU (w/o controls) */
123 /* 15: MU */
135 Dig_IN[4]---+->FU[6]-->MU[16]->FU[18]-+->EU[21]->SU[31]----->FU[30]->Hph_OUT[20]
154 /* 16: MU w/o controls */
225 /* 6: MU */
230 /* 11: MU */
253 /* 0xb: MU (w/o controls) */
[all …]
/linux/arch/riscv/crypto/
H A Daes-riscv64-zvkned-zvkb.S79 vsetivli zero, 4, e32, m1, ta, mu
91 vsetvli VL_E32, LEN32, e32, m4, ta, mu
98 vsetvli VL_E32, LEN32, e32, m4, ta, mu
128 vsetivli zero, 4, e32, m1, ta, mu
/linux/drivers/iio/dac/
H A Dad9739a.c189 * and Mu controller. Look at table 29.
195 /* Mu controller configuration */
214 * Try to get the Mu lock. Repeat the below steps AD9739A_LOCK_N_TRIES in ad9739a_init()
223 /* Enable the Mu controller search and track mode. */ in ad9739a_init()
238 return dev_err_probe(dev, ret, "Mu lock timeout\n"); in ad9739a_init()
240 /* Receiver tracking and lock. Same deal as the Mu controller */ in ad9739a_init()
/linux/drivers/firmware/imx/
H A Dimx-scu-irq.c5 * Implementation of the SCU IRQ functions using MU.
230 i = of_alias_get_id(spec.np, "mu"); in imx_scu_enable_general_irq_channel()
232 /* use mu1 as general mu irq channel if failed */ in imx_scu_enable_general_irq_channel()
/linux/drivers/isdn/mISDN/
H A Ddsp_audio.c90 short mu, e, f, y; in ulaw2linear() local
93 mu = 255 - ulaw; in ulaw2linear()
94 e = (mu & 0x70) / 16; in ulaw2linear()
95 f = mu & 0x0f; in ulaw2linear()
98 if (mu & 0x80) in ulaw2linear()
/linux/sound/pci/emu10k1/
H A Demu10k1_main.c1067 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1071 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1080 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1081 * MicroDock[M] to make it an E-MU 1616[m]. */
1084 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1092 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1093 * MicroDockM to make it an E-MU 1616m. The non-m
1098 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1106 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1107 * AudioDock[M] to make it an E-MU 1820[m]. */
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dmain.c548 u32 *mu; in mt7615_update_mu_group() local
550 mu = (u32 *)info->mu_group.membership; in mt7615_update_mu_group()
551 for (i = 0; i < WLAN_MEMBERSHIP_LEN / sizeof(*mu); i++) { in mt7615_update_mu_group()
553 mt76_wr(dev, MT7663_WF_PHY_GID_TAB_VLD(band, i), mu[i]); in mt7615_update_mu_group()
555 mt76_wr(dev, MT_WF_PHY_GID_TAB_VLD(band, i), mu[i]); in mt7615_update_mu_group()
558 mu = (u32 *)info->mu_group.position; in mt7615_update_mu_group()
559 for (i = 0; i < WLAN_USER_POSITION_LEN / sizeof(*mu); i++) { in mt7615_update_mu_group()
561 mt76_wr(dev, MT7663_WF_PHY_GID_TAB_POS(band, i), mu[i]); in mt7615_update_mu_group()
563 mt76_wr(dev, MT_WF_PHY_GID_TAB_POS(band, i), mu[i]); in mt7615_update_mu_group()
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_mutex.c119 * MU Atomic Engine's CmpAndSwap32 command are supported.
166 * nfp_cpp_mutex_lock() - Lock a mutex handle, using the NFP MU Atomic Engine
212 * nfp_cpp_mutex_unlock() - Unlock a mutex handle, using the MU Atomic Engine

12345