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Searched +full:mt8195 +full:- +full:memory +full:- +full:port (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
13 Some MediaTek SOCs contain a Multimedia Memory Management Unit (M4U), and
16 ARM Short-Descriptor translation table format for address translation.
20 EMI (External Memory Interface)
22 m4u (Multimedia Memory Management Unit)
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
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/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mt8195-jpegenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgenc
19 power-domains:
25 Points to the respective IOMMU block with master port as argument, see
29 "#address-cells":
32 "#size-cells":
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H A Dmediatek,mt8195-jpegdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - kyrie wu <kyrie.wu@mediatek.corp-partner.google.com>
17 const: mediatek,mt8195-jpgdec
19 power-domains:
25 Points to the respective IOMMU block with master port as argument, see
29 "#address-cells":
32 "#size-cells":
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H A Dmediatek,mdp3-rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek Read Direct Memory Access
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
14 MediaTek Read Direct Memory Access(RDMA) component used to do read DMA.
24 - enum:
25 - mediatek,mt8183-mdp3-rdma
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H A Dmediatek,mdp3-wrot.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
19 - enum:
20 - mediatek,mt8183-mdp3-wrot
21 - items:
22 - enum:
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Yong Wu <yong.wu@mediatek.com>
19 generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.
22 register which control the iommu port is at each larb's register base. But
31 - enum:
32 - mediatek,mt2701-smi-common
33 - mediatek,mt2712-smi-common
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
50 if (info->num_planes != 1) in mtk_drm_mode_fb_create()
51 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create()
326 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
331 { .compatible = "mediatek,mt2701-mmsys",
333 { .compatible = "mediatek,mt7623-mmsys",
335 { .compatible = "mediatek,mt2712-mmsys",
337 { .compatible = "mediatek,mt8167-mmsys",
339 { .compatible = "mediatek,mt8173-mmsys",
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/linux/drivers/memory/
H A Dmtk-smi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
6 #include <linux/arm-smccc.h>
20 #include <dt-bindings/memory/mt2701-larb-port.h>
21 #include <dt-bindings/memory/mtk-memory-port.h>
58 /* every register control 8 port, register offset 0x4 */
64 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
65 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
66 * or non-security.
155 struct device *smi_common_dev; /* common or sub-common dev */
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/linux/drivers/iommu/
H A Dmtk_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
6 #include <linux/arm-smccc.h>
17 #include <linux/io-pgtable.h>
36 #include <dt-bindings/memory/mtk-memory-port.h>
113 /* Macro for 5 bits length port ID field (default) */
116 /* Macro for 6 bits length port ID field */
152 ((((pdata)->flags) & (mask)) == (_x))
208 * is in 4G-8G and cam is in 8G-12G. Meanwhile, some masters may have the
210 * 0x40000000-0x44000000.
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