Searched +full:mt8195 +full:- +full:disp +full:- +full:ethdr (Results 1 – 6 of 6) sorted by relevance
/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_disp_ovl_adaptor.c | 1 // SPDX-License-Identifier: GPL-2.0-only 16 #include <linux/soc/mediatek/mtk-cmdq.h> 17 #include <linux/soc/mediatek/mtk-mmsys.h> 18 #include <linux/soc/mediatek/mtk-mutex.h> 75 [OVL_ADAPTOR_TYPE_ETHDR] = "ethdr", 76 [OVL_ADAPTOR_TYPE_MDP_RDMA] = "vdo1-rdma", 81 static const struct mtk_ddp_comp_funcs ethdr = { variable 109 [OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR, DDP_COMPONENT_ETHDR_MIXER, 0, ðdr }, 137 struct mtk_plane_pending_state *pending = &state->pending; in mtk_ovl_adaptor_layer_config() 142 struct device *ethdr; in mtk_ovl_adaptor_layer_config() local [all …]
|
H A D | mtk_ethdr.c | 1 // SPDX-License-Identifier: GPL-2.0-only 15 #include <linux/soc/mediatek/mtk-cmdq.h> 16 #include <linux/soc/mediatek/mtk-mmsys.h> 108 priv->vblank_cb = vblank_cb; in mtk_ethdr_register_vblank_cb() 109 priv->vblank_cb_data = vblank_cb_data; in mtk_ethdr_register_vblank_cb() 116 priv->vblank_cb = NULL; in mtk_ethdr_unregister_vblank_cb() 117 priv->vblank_cb_data = NULL; in mtk_ethdr_unregister_vblank_cb() 124 writel(MIX_FME_CPL_INTEN, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTEN); in mtk_ethdr_enable_vblank() 131 writel(0x0, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTEN); in mtk_ethdr_disable_vblank() 138 writel(0x0, priv->ethdr_comp[ETHDR_MIXER].regs + MIX_INTSTA); in mtk_ethdr_irq_handler() [all …]
|
H A D | mtk_drm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <linux/dma-mapping.h> 51 if (info->num_planes != 1) in mtk_drm_mode_fb_create() 52 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create() 327 .min_width = 2, /* 2-pixel align when ethdr is bypassed */ 332 { .compatible = "mediatek,mt2701-mmsys", 334 { .compatible = "mediatek,mt7623-mmsys", 336 { .compatible = "mediatek,mt2712-mmsys", 338 { .compatible = "mediatek,mt8167-mmsys", 340 { .compatible = "mediatek,mt8173-mmsys", [all …]
|
/linux/Documentation/devicetree/bindings/display/mediatek/ |
H A D | mediatek,padding.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 16 width of a layer to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled, 24 - mediatek,mt8188-disp-padding 25 - mediatek,mt8195-mdp3-padding 30 power-domains: 35 - description: Padding's clocks [all …]
|
/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 8 #include <dt-bindings/clock/mediatek,mt8188-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/mailbox/mediatek,mt8188-gce.h> 12 #include <dt-bindings/memory/mediatek,mt8188-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 15 #include <dt-bindings/power/mediatek,mt8188-power.h> [all …]
|
H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
|