Searched +full:mt8183 +full:- +full:dsi (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/display/mediatek/ |
H A D | mediatek,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DSI Controller 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 - Jitao Shi <jitao.shi@mediatek.com> 15 The MediaTek DSI function block is a sink of the display subsystem and can 16 drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual- [all …]
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H A D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 data into DMA. It provides real time data to the back-end panel 16 driver, such as DSI, DPI and DP_INTF. 26 - enum: 27 - mediatek,mt2701-disp-rdma 28 - mediatek,mt8173-disp-rdma [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | mediatek,dsi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek MIPI Display Serial Interface (DSI) PHY 11 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 12 - Philipp Zabel <p.zabel@pengutronix.de> 13 - Chunfeng Yun <chunfeng.yun@mediatek.com> 15 description: The MIPI DSI PHY supports up to 4-lane output. 19 pattern: "^dsi-phy@[0-9a-f]+$" [all …]
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/linux/drivers/gpu/drm/mediatek/ |
H A D | mtk_drm_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <linux/dma-mapping.h> 49 if (info->num_planes != 1) in mtk_drm_mode_fb_create() 50 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create() 325 .min_width = 2, /* 2-pixel align when ethdr is bypassed */ 330 { .compatible = "mediatek,mt2701-mmsys", 332 { .compatible = "mediatek,mt7623-mmsys", 334 { .compatible = "mediatek,mt2712-mmsys", 336 { .compatible = "mediatek,mt8167-mmsys", 338 { .compatible = "mediatek,mt8173-mmsys", [all …]
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/linux/drivers/phy/mediatek/ |
H A D | phy-mtk-mipi-dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "phy-mtk-mipi-dsi.h" 18 dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate); in mtk_mipi_tx_pll_set_rate() 20 mipi_tx->data_rate = rate; in mtk_mipi_tx_pll_set_rate() 30 return mipi_tx->data_rate; in mtk_mipi_tx_pll_recalc_rate() 39 ret = clk_prepare_enable(mipi_tx->pll_hw.clk); in mtk_mipi_tx_power_on() 43 /* Enable DSI Lane LDO outputs, disable pad tie low */ in mtk_mipi_tx_power_on() 44 mipi_tx->driver_data->mipi_tx_enable_signal(phy); in mtk_mipi_tx_power_on() 52 /* Enable pad tie low, disable DSI Lane LDO outputs */ in mtk_mipi_tx_power_off() 53 mipi_tx->driver_data->mipi_tx_disable_signal(phy); in mtk_mipi_tx_power_off() [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 12 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 13 #include <dt-bindings/memory/mt6795-larb-port.h> 14 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 15 #include <dt-bindings/power/mt6795-power.h> 16 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 20 interrupt-parent = <&sysirq>; [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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