1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "phy-mtk-mipi-dsi.h"
18 	dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate);  in mtk_mipi_tx_pll_set_rate()
20 	mipi_tx->data_rate = rate;  in mtk_mipi_tx_pll_set_rate()
30 	return mipi_tx->data_rate;  in mtk_mipi_tx_pll_recalc_rate()
39 	ret = clk_prepare_enable(mipi_tx->pll_hw.clk);  in mtk_mipi_tx_power_on()
43 	/* Enable DSI Lane LDO outputs, disable pad tie low */  in mtk_mipi_tx_power_on()
44 	mipi_tx->driver_data->mipi_tx_enable_signal(phy);  in mtk_mipi_tx_power_on()
52 	/* Enable pad tie low, disable DSI Lane LDO outputs */  in mtk_mipi_tx_power_off()
53 	mipi_tx->driver_data->mipi_tx_disable_signal(phy);  in mtk_mipi_tx_power_off()
56 	clk_disable_unprepare(mipi_tx->pll_hw.clk);  in mtk_mipi_tx_power_off()
73 	cell = nvmem_cell_get(mipi_tx->dev, "calibration-data");  in mtk_mipi_tx_get_calibration_datal()
75 		dev_info(mipi_tx->dev, "can't get nvmem_cell_get, ignore it\n");  in mtk_mipi_tx_get_calibration_datal()
82 		dev_info(mipi_tx->dev, "can't get data, ignore it\n");  in mtk_mipi_tx_get_calibration_datal()
87 		dev_info(mipi_tx->dev, "invalid calibration data\n");  in mtk_mipi_tx_get_calibration_datal()
92 	mipi_tx->rt_code[0] = ((buf[0] >> 6 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
94 	mipi_tx->rt_code[1] = ((buf[1] >> 27 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
96 	mipi_tx->rt_code[2] = ((buf[1] >> 17 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
98 	mipi_tx->rt_code[3] = ((buf[1] >> 7 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
100 	mipi_tx->rt_code[4] = ((buf[2] >> 27 & 0x1f) << 5) |  in mtk_mipi_tx_get_calibration_datal()
107 	struct device *dev = &pdev->dev;  in mtk_mipi_tx_probe()
122 		return -ENOMEM;  in mtk_mipi_tx_probe()
124 	mipi_tx->driver_data = of_device_get_match_data(dev);  in mtk_mipi_tx_probe()
125 	if (!mipi_tx->driver_data)  in mtk_mipi_tx_probe()
126 		return -ENODEV;  in mtk_mipi_tx_probe()
128 	mipi_tx->regs = devm_platform_ioremap_resource(pdev, 0);  in mtk_mipi_tx_probe()
129 	if (IS_ERR(mipi_tx->regs))  in mtk_mipi_tx_probe()
130 		return PTR_ERR(mipi_tx->regs);  in mtk_mipi_tx_probe()
137 	ret = of_property_read_u32(dev->of_node, "drive-strength-microamp",  in mtk_mipi_tx_probe()
138 				   &mipi_tx->mipitx_drive);  in mtk_mipi_tx_probe()
139 	/* If can't get the "mipi_tx->mipitx_drive", set it default 0x8 */  in mtk_mipi_tx_probe()
141 		mipi_tx->mipitx_drive = 4600;  in mtk_mipi_tx_probe()
144 	if (mipi_tx->mipitx_drive > 6000 || mipi_tx->mipitx_drive < 3000) {  in mtk_mipi_tx_probe()
145 		dev_warn(dev, "drive-strength-microamp is invalid %d, not in 3000 ~ 6000\n",  in mtk_mipi_tx_probe()
146 			 mipi_tx->mipitx_drive);  in mtk_mipi_tx_probe()
147 		mipi_tx->mipitx_drive = clamp_val(mipi_tx->mipitx_drive, 3000,  in mtk_mipi_tx_probe()
153 	ret = of_property_read_string(dev->of_node, "clock-output-names",  in mtk_mipi_tx_probe()
156 		return dev_err_probe(dev, ret, "Failed to read clock-output-names\n");  in mtk_mipi_tx_probe()
158 	clk_init.ops = mipi_tx->driver_data->mipi_tx_clk_ops;  in mtk_mipi_tx_probe()
160 	mipi_tx->pll_hw.init = &clk_init;  in mtk_mipi_tx_probe()
161 	ret = devm_clk_hw_register(dev, &mipi_tx->pll_hw);  in mtk_mipi_tx_probe()
167 		return dev_err_probe(dev, PTR_ERR(phy), "Failed to create MIPI D-PHY\n");  in mtk_mipi_tx_probe()
175 	mipi_tx->dev = dev;  in mtk_mipi_tx_probe()
179 	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &mipi_tx->pll_hw);  in mtk_mipi_tx_probe()
183 	{ .compatible = "mediatek,mt2701-mipi-tx", .data = &mt2701_mipitx_data },
184 	{ .compatible = "mediatek,mt8173-mipi-tx", .data = &mt8173_mipitx_data },
185 	{ .compatible = "mediatek,mt8183-mipi-tx", .data = &mt8183_mipitx_data },
193 		.name = "mediatek-mipi-tx",