Home
last modified time | relevance | path

Searched +full:mt2712 +full:- +full:pwm (Results 1 – 6 of 6) sorted by relevance

/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,mt2712-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek PWM Controller
10 - John Crispin <john@phrozen.org>
13 - $ref: pwm.yaml#
18 - enum:
19 - mediatek,mt2712-pwm
20 - mediatek,mt6795-pwm
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
17 compatible = "mediatek,mt2712";
18 interrupt-parent = <&sysirq>;
[all …]
/linux/drivers/pwm/
H A Dpwm-mediatek.c1 // SPDX-License-Identifier: GPL-2.0
18 #include <linux/pwm.h>
22 /* PWM registers and bits definitions */
44 * struct pwm_mediatek_chip - struct representing PWM chip
45 * @regs: base address of PWM chip
47 * @clk_main: the clock used by PWM core
48 * @clk_pwms: the clock used by each PWM channel
74 struct pwm_device *pwm) in pwm_mediatek_clk_enable() argument
79 ret = clk_prepare_enable(pc->clk_top); in pwm_mediatek_clk_enable()
83 ret = clk_prepare_enable(pc->clk_main); in pwm_mediatek_clk_enable()
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/mt7629-clk.h>
11 #include <dt-bindings/power/mt7622-power.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/mt7629-resets.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
[all …]
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
50 if (info->num_planes != 1) in mtk_drm_mode_fb_create()
51 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create()
326 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
331 { .compatible = "mediatek,mt2701-mmsys",
333 { .compatible = "mediatek,mt7623-mmsys",
335 { .compatible = "mediatek,mt2712-mmsys",
337 { .compatible = "mediatek,mt8167-mmsys",
339 { .compatible = "mediatek,mt8173-mmsys",
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]