Lines Matching +full:mt2712 +full:- +full:pwm
1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/dma-mapping.h>
49 if (info->num_planes != 1)
50 return ERR_PTR(-EINVAL);
325 .min_width = 2, /* 2-pixel align when ethdr is bypassed */
334 { .compatible = "mediatek,mt2701-mmsys",
336 { .compatible = "mediatek,mt7623-mmsys",
338 { .compatible = "mediatek,mt2712-mmsys",
340 { .compatible = "mediatek,mt8167-mmsys",
342 { .compatible = "mediatek,mt8173-mmsys",
344 { .compatible = "mediatek,mt8183-mmsys",
346 { .compatible = "mediatek,mt8186-mmsys",
348 { .compatible = "mediatek,mt8188-vdosys0",
350 { .compatible = "mediatek,mt8188-vdosys1",
352 { .compatible = "mediatek,mt8192-mmsys",
354 { .compatible = "mediatek,mt8195-mmsys",
356 { .compatible = "mediatek,mt8195-vdosys0",
358 { .compatible = "mediatek,mt8195-vdosys1",
360 { .compatible = "mediatek,mt8365-mmsys",
368 if (!strncmp(dev_name(dev), "mediatek-drm", sizeof("mediatek-drm") - 1))
378 struct device_node *phandle = dev->parent->of_node;
385 for_each_child_of_node(phandle->parent, node) {
396 drm_dev = device_find_child(&pdev->dev, NULL, mtk_drm_match);
404 if (temp_drm_priv->data->main_len)
406 else if (temp_drm_priv->data->ext_len)
408 else if (temp_drm_priv->data->third_len)
411 if (temp_drm_priv->mtk_drm_bound)
420 if (drm_priv->data->mmsys_dev_num == cnt) {
423 all_drm_priv[j]->all_drm_private[i] = all_drm_priv[i];
433 const struct mtk_mmsys_driver_data *drv_data = private->data;
436 if (drv_data->main_path)
437 for (i = 0; i < drv_data->main_len; i++)
438 if (drv_data->main_path[i] == comp_id)
441 if (drv_data->ext_path)
442 for (i = 0; i < drv_data->ext_len; i++)
443 if (drv_data->ext_path[i] == comp_id)
446 if (drv_data->third_path)
447 for (i = 0; i < drv_data->third_len; i++)
448 if (drv_data->third_path[i] == comp_id)
451 if (drv_data->num_conn_routes)
452 for (i = 0; i < drv_data->num_conn_routes; i++)
453 if (drv_data->conn_routes[i].route_ddp == comp_id)
461 struct mtk_drm_private *private = drm->dev_private;
468 return -ENODEV;
474 drm->mode_config.min_width = 64;
475 drm->mode_config.min_height = 64;
482 drm->mode_config.max_width = 4096;
483 drm->mode_config.max_height = 4096;
484 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
485 drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
487 for (i = 0; i < private->data->mmsys_dev_num; i++) {
488 drm->dev_private = private->all_drm_private[i];
489 ret = component_bind_all(private->all_drm_private[i]->dev, drm);
491 while (--i >= 0)
492 component_unbind_all(private->all_drm_private[i]->dev, drm);
506 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
513 for (j = 0; j < private->data->mmsys_dev_num; j++) {
514 priv_n = private->all_drm_private[j];
516 if (priv_n->data->max_width)
517 drm->mode_config.max_width = priv_n->data->max_width;
519 if (priv_n->data->min_width)
520 drm->mode_config.min_width = priv_n->data->min_width;
522 if (priv_n->data->min_height)
523 drm->mode_config.min_height = priv_n->data->min_height;
525 if (i == CRTC_MAIN && priv_n->data->main_len) {
526 ret = mtk_crtc_create(drm, priv_n->data->main_path,
527 priv_n->data->main_len, j,
528 priv_n->data->conn_routes,
529 priv_n->data->num_conn_routes);
534 } else if (i == CRTC_EXT && priv_n->data->ext_len) {
535 ret = mtk_crtc_create(drm, priv_n->data->ext_path,
536 priv_n->data->ext_len, j, NULL, 0);
541 } else if (i == CRTC_THIRD && priv_n->data->third_len) {
542 ret = mtk_crtc_create(drm, priv_n->data->third_path,
543 priv_n->data->third_len, j, NULL, 0);
553 drm->mode_config.cursor_width = 512;
554 drm->mode_config.cursor_height = 512;
561 ret = -ENODEV;
562 dev_err(drm->dev, "Need at least one OVL device\n");
566 for (i = 0; i < private->data->mmsys_dev_num; i++)
567 private->all_drm_private[i]->dma_dev = dma_dev;
585 for (i = 0; i < private->data->mmsys_dev_num; i++)
586 component_unbind_all(private->all_drm_private[i]->dev, drm);
596 component_unbind_all(drm->dev, drm);
603 * not dev->dev, as drm_gem_prime_import() expects.
608 struct mtk_drm_private *private = dev->dev_private;
610 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
641 pdev = of_find_device_by_node(private->mutex_node);
643 dev_err(dev, "Waiting for disp-mutex device %pOF\n",
644 private->mutex_node);
645 of_node_put(private->mutex_node);
646 return -EPROBE_DEFER;
649 private->mutex_dev = &pdev->dev;
650 private->mtk_drm_bound = true;
651 private->dev = dev;
662 private->drm_master = true;
663 drm->dev_private = private;
664 for (i = 0; i < private->data->mmsys_dev_num; i++)
665 private->all_drm_private[i]->drm = drm;
682 private->drm = NULL;
684 for (i = 0; i < private->data->mmsys_dev_num; i++)
685 private->all_drm_private[i]->drm = NULL;
687 for (i = 0; i < private->data->mmsys_dev_num; i++) {
689 put_device(private->all_drm_private[i]->dev);
691 put_device(private->mutex_dev);
701 if (private->drm_master) {
702 drm_dev_unregister(private->drm);
703 mtk_drm_kms_deinit(private->drm);
704 drm_dev_put(private->drm);
706 for (i = 0; i < private->data->mmsys_dev_num; i++) {
708 put_device(private->all_drm_private[i]->dev);
710 put_device(private->mutex_dev);
712 private->mtk_drm_bound = false;
713 private->drm_master = false;
714 private->drm = NULL;
723 { .compatible = "mediatek,mt8167-disp-aal",
725 { .compatible = "mediatek,mt8173-disp-aal",
727 { .compatible = "mediatek,mt8183-disp-aal",
729 { .compatible = "mediatek,mt8192-disp-aal",
731 { .compatible = "mediatek,mt8167-disp-ccorr",
733 { .compatible = "mediatek,mt8183-disp-ccorr",
735 { .compatible = "mediatek,mt8192-disp-ccorr",
737 { .compatible = "mediatek,mt2701-disp-color",
739 { .compatible = "mediatek,mt8167-disp-color",
741 { .compatible = "mediatek,mt8173-disp-color",
743 { .compatible = "mediatek,mt8167-disp-dither",
745 { .compatible = "mediatek,mt8183-disp-dither",
747 { .compatible = "mediatek,mt8195-disp-dsc",
749 { .compatible = "mediatek,mt8167-disp-gamma",
751 { .compatible = "mediatek,mt8173-disp-gamma",
753 { .compatible = "mediatek,mt8183-disp-gamma",
755 { .compatible = "mediatek,mt8195-disp-gamma",
757 { .compatible = "mediatek,mt8195-disp-merge",
759 { .compatible = "mediatek,mt2701-disp-mutex",
761 { .compatible = "mediatek,mt2712-disp-mutex",
763 { .compatible = "mediatek,mt8167-disp-mutex",
765 { .compatible = "mediatek,mt8173-disp-mutex",
767 { .compatible = "mediatek,mt8183-disp-mutex",
769 { .compatible = "mediatek,mt8186-disp-mutex",
771 { .compatible = "mediatek,mt8188-disp-mutex",
773 { .compatible = "mediatek,mt8192-disp-mutex",
775 { .compatible = "mediatek,mt8195-disp-mutex",
777 { .compatible = "mediatek,mt8365-disp-mutex",
779 { .compatible = "mediatek,mt8173-disp-od",
781 { .compatible = "mediatek,mt2701-disp-ovl",
783 { .compatible = "mediatek,mt8167-disp-ovl",
785 { .compatible = "mediatek,mt8173-disp-ovl",
787 { .compatible = "mediatek,mt8183-disp-ovl",
789 { .compatible = "mediatek,mt8192-disp-ovl",
791 { .compatible = "mediatek,mt8195-disp-ovl",
793 { .compatible = "mediatek,mt8183-disp-ovl-2l",
795 { .compatible = "mediatek,mt8192-disp-ovl-2l",
797 { .compatible = "mediatek,mt8192-disp-postmask",
799 { .compatible = "mediatek,mt2701-disp-pwm",
801 { .compatible = "mediatek,mt8167-disp-pwm",
803 { .compatible = "mediatek,mt8173-disp-pwm",
805 { .compatible = "mediatek,mt2701-disp-rdma",
807 { .compatible = "mediatek,mt8167-disp-rdma",
809 { .compatible = "mediatek,mt8173-disp-rdma",
811 { .compatible = "mediatek,mt8183-disp-rdma",
813 { .compatible = "mediatek,mt8195-disp-rdma",
815 { .compatible = "mediatek,mt8173-disp-ufoe",
817 { .compatible = "mediatek,mt8173-disp-wdma",
819 { .compatible = "mediatek,mt2701-dpi",
821 { .compatible = "mediatek,mt8167-dsi",
823 { .compatible = "mediatek,mt8173-dpi",
825 { .compatible = "mediatek,mt8183-dpi",
827 { .compatible = "mediatek,mt8186-dpi",
829 { .compatible = "mediatek,mt8188-dp-intf",
831 { .compatible = "mediatek,mt8192-dpi",
833 { .compatible = "mediatek,mt8195-dp-intf",
835 { .compatible = "mediatek,mt8195-dpi",
837 { .compatible = "mediatek,mt2701-dsi",
839 { .compatible = "mediatek,mt8173-dsi",
841 { .compatible = "mediatek,mt8183-dsi",
843 { .compatible = "mediatek,mt8186-dsi",
845 { .compatible = "mediatek,mt8188-dsi",
855 return -EINVAL;
857 *ctype = (enum mtk_ddp_comp_type)((uintptr_t)of_id->data);
872 return -ENOENT;
877 return -EINVAL;
887 return -ENODEV;
909 * mtk_drm_of_ddp_path_build_one - Build a Display HW Pipeline for a CRTC Path
910 * @dev: The mediatek-drm device
916 * on the board-specific desired display configuration; this function walks
921 * * %0 - Display HW Pipeline successfully built and validated
922 * * %-ENOENT - Display pipeline was not specified in device tree
923 * * %-EINVAL - Display pipeline built but validation failed
924 * * %-ENOMEM - Failure to allocate pipeline array to pass to the caller
930 struct device_node *next = NULL, *prev, *vdo = dev->parent->of_node;
955 * Walk through port outputs until we reach the last valid mediatek-drm component.
978 idx--;
986 if (ret == -ENODEV)
990 switch (temp_path[idx - 1]) {
1002 temp_path[idx - 1], ret);
1003 return -EINVAL;
1008 return -ENOMEM;
1035 ret = dev_err_probe(dev, -EINVAL,
1050 &data->main_path, &data->main_len);
1051 if (ret && ret != -ENODEV)
1057 &data->ext_path, &data->ext_len);
1058 if (ret && ret != -ENODEV)
1064 &data->third_path, &data->third_len);
1065 if (ret && ret != -ENODEV)
1074 struct device *dev = &pdev->dev;
1075 struct device_node *phandle = dev->parent->of_node;
1087 return -ENOMEM;
1089 private->mmsys_dev = dev->parent;
1090 if (!private->mmsys_dev) {
1092 return -ENODEV;
1097 return -ENODEV;
1099 mtk_drm_data = (struct mtk_mmsys_driver_data *)of_id->data;
1101 return -EINVAL;
1106 mtk_drm_data->mmsys_id);
1107 private->data = devm_kmemdup(dev, mtk_drm_data,
1109 if (!private->data)
1110 return -ENOMEM;
1112 ret = mtk_drm_of_ddp_path_build(dev, phandle, private->data);
1117 dev_dbg(dev, "Using hardcoded paths for MMSYS %u\n", mtk_drm_data->mmsys_id);
1118 private->data = mtk_drm_data;
1121 private->all_drm_private = devm_kmalloc_array(dev, private->data->mmsys_dev_num,
1122 sizeof(*private->all_drm_private),
1124 if (!private->all_drm_private)
1125 return -ENOMEM;
1129 ovl_adaptor = platform_device_register_data(dev, "mediatek-disp-ovl-adaptor",
1131 (void *)private->mmsys_dev,
1132 sizeof(*private->mmsys_dev));
1133 private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR].dev = &ovl_adaptor->dev;
1134 mtk_ddp_comp_init(NULL, &private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR],
1136 component_match_add(dev, &match, compare_dev, &ovl_adaptor->dev);
1140 for_each_child_of_node(phandle->parent, node) {
1158 if (id < 0 || id == private->data->mmsys_id) {
1159 private->mutex_node = of_node_get(node);
1160 dev_dbg(dev, "get mutex for mmsys %d", private->data->mmsys_id);
1175 private->comp_node[comp_id] = of_node_get(node);
1200 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
1207 if (!private->mutex_node) {
1208 dev_err(dev, "Failed to find disp-mutex node\n");
1209 ret = -ENODEV;
1226 of_node_put(private->mutex_node);
1228 of_node_put(private->comp_node[i]);
1237 component_master_del(&pdev->dev, &mtk_drm_ops);
1238 pm_runtime_disable(&pdev->dev);
1239 of_node_put(private->mutex_node);
1241 of_node_put(private->comp_node[i]);
1248 drm_atomic_helper_shutdown(private->drm);
1254 struct drm_device *drm = private->drm;
1256 if (private->drm_master)
1265 struct drm_device *drm = private->drm;
1268 if (private->drm_master)
1284 .name = "mediatek-drm",