| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 Qualcomm "B" family devices which are not compatible with arm-smmu have 16 to non-secure vs secure interrupt line. 21 - items: 22 - enum: 23 - qcom,msm8916-iommu [all …]
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| /linux/Documentation/devicetree/bindings/soc/qcom/ |
| H A D | qcom,apr-services.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 21 APR Service ID 33 GPR Service ID 39 qcom,protection-domain: 40 $ref: /schemas/types.yaml#/definitions/string-array 44 "avs/audio", "msm/adsp/audio_pd". [all …]
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| H A D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 16 representing a serial sub-node device that is mux'd as part of the GSBI 26 const: qcom,gsbi-v1.0.0 28 '#address-cells': [all …]
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| H A D | qcom,apr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,apr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> 20 - qcom,apr 21 - qcom,apr-v2 22 - qcom,gpr 24 power-domains: 27 qcom,apr-domain: [all …]
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| /linux/Documentation/devicetree/bindings/serial/ |
| H A D | qcom,msm-uartdm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM Serial UARTDM 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 The MSM serial UARTDM hardware is designed for high-speed use cases where the 16 transmit and/or receive channels can be offloaded to a dma-engine. From a [all …]
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| H A D | qcom,msm-uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm MSM SoC Serial UART 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 14 The MSM serial UART hardware is designed for low-speed use cases where a 15 dma-engine isn't needed. From a software perspective it's mostly compatible 16 with the MSM serial UARTDM except that it only supports reading and writing [all …]
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| /linux/Documentation/gpu/ |
| H A D | msm-crash-dump.rst | 4 MSM Crash Dump Format 7 Following a GPU hang the MSM driver outputs debugging information via 14 by a (-). 17 -------- 35 ID of the GPU that generated the crash formatted as 38 rbbm-status 44 identified with an id number. 46 id 47 Ringbuffer ID (0 based index). Each ringbuffer in the section 48 will have its own unique id. [all …]
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | qcom-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer 10 - Rajendra Nayak <quic_rjendra@quicinc.com> 14 pattern: "^(watchdog|timer)@[0-9a-f]+$" 18 - items: 19 - enum: 20 - qcom,kpss-wdt-ipq4019 [all …]
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| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sc8280xp-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates 14 sub-blocks like DPU display controller, DSI and DP interfaces etc. 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sc8280xp-mdss 24 - description: Display AHB clock from gcc [all …]
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| H A D | qcom,sm6115-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm6115-dpu 20 - description: MDP register set 21 - description: VBIF register set 23 reg-names: [all …]
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| H A D | qcom,qcm2290-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <loic.poulain@linaro.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,qcm2290-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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| H A D | qcom,sdm845-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sdm670-dpu 18 - qcom,sdm845-dpu 22 - description: Address offset and size for mdp register set 23 - description: Address offset and size for vbif register set [all …]
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| H A D | mdss-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 12 - Rob Clark <robdclark@gmail.com> 15 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 16 sub-blocks like DPU display controller, DSI and DP interfaces etc. 25 pattern: "^display-subsystem@[0-9a-f]+$" [all …]
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| H A D | qcom,msm8998-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,msm8998-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for regdma register set 22 - description: Address offset and size for vbif register set [all …]
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| H A D | qcom,qcm2290-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Loic Poulain <loic.poulain@linaro.org> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,qcm2290-mdss 25 - description: Display AHB clock from gcc [all …]
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| H A D | qcom,sm6125-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marijn Suijten <marijn.suijten@somainline.org> 13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6125-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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| H A D | qcom,sm6375-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6375-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AHB clock [all …]
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| H A D | qcom,sm6115-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS 17 $ref: /schemas/display/msm/mdss-common.yaml# 21 const: qcom,sm6115-mdss 25 - description: Display AHB clock from gcc [all …]
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| H A D | qcom,sc7180-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 17 - qcom,sc7180-dpu 18 - qcom,sm6125-dpu 19 - qcom,sm6350-dpu 20 - qcom,sm6375-dpu [all …]
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| H A D | qcom,sm6150-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6150-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Abhinav Kumar <quic_abhinavk@quicinc.com> 11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 13 $ref: /schemas/display/msm/dpu-common.yaml# 17 const: qcom,sm6150-dpu 21 - description: Address offset and size for mdp register set 22 - description: Address offset and size for vbif register set [all …]
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| H A D | qcom,sm6150-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6150-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Abhinav Kumar <quic_abhinavk@quicinc.com> 11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 14 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates 15 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree 18 $ref: /schemas/display/msm/mdss-common.yaml# 23 - const: qcom,sm6150-mdss [all …]
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| H A D | qcom,sm6350-mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krishna Manikandan <quic_mkrishn@quicinc.com> 13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks 16 $ref: /schemas/display/msm/mdss-common.yaml# 20 const: qcom,sm6350-mdss 24 - description: Display AHB clock from gcc 25 - description: Display AXI clock from gcc [all …]
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| H A D | qcom,sm7150-dpu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/msm/qcom,sm7150-dpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Danila Tikhonov <danila@jiaxyga.com> 12 $ref: /schemas/display/msm/dpu-common.yaml# 16 const: qcom,sm7150-dpu 20 - description: Address offset and size for mdp register set 21 - description: Address offset and size for vbif register set 23 reg-names: [all …]
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| /linux/drivers/iommu/arm/arm-smmu/ |
| H A D | qcom_iommu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * IOMMU API for QCOM secure IOMMUs. Somewhat based on arm-smmu.c 13 #include <linux/dma-mapping.h> 17 #include <linux/io-64-nonatomic-hi-lo.h> 18 #include <linux/io-pgtable.h> 33 #include "arm-smmu.h" 84 struct qcom_iommu_dev *qcom_iommu = d->iommu; in to_ctx() 87 return qcom_iommu->ctxs[asid]; in to_ctx() 93 writel_relaxed(val, ctx->base + reg); in iommu_writel() 99 writeq_relaxed(val, ctx->base + reg); in iommu_writeq() [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sdm636-sony-xperia-ganges-mermaid.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "sdm630-sony-xperia-ganges-kirin.dts" 13 compatible = "sony,mermaid-row", "qcom,sdm636"; 14 chassis-type = "handset"; 17 qcom,msm-id = <345 0>; 18 …qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00 0x1001b 0x102001a 0x00 0x0… 22 clk-pins { 23 drive-strength = <14>;
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