Home
last modified time | relevance | path

Searched full:mpll2 (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Damlogic,s4-peripherals-clkc.yaml33 - description: input mpll2
52 - const: mpll2
93 "mpll0", "mpll1", "mpll2", "mpll3", "hdmi_pll", "xtal";
H A Dsophgo,sg2044-clk.yaml41 - description: mpll2
61 - const: mpll2
97 "mpll1", "mpll2", "mpll3", "mpll4",
/linux/drivers/clk/sprd/
H A Dsc9863a-clk.c38 static SPRD_PLL_SC_GATE_CLK_FW_NAME(mpll2_gate, "mpll2-gate", "ext-26m", 0x1e4,
204 static SPRD_PLL_HW(mpll2, "mpll2", &mpll2_gate.common.hw, 0x30, 3, itable_mpll,
206 static CLK_FIXED_FACTOR_HW(mpll2_675m, "mpll2-675m", &mpll2.common.hw, 2, 1, 0);
212 &mpll2.common,
219 [CLK_MPLL2] = &mpll2.common.hw,
654 { .hw = &mpll2.common.hw },
688 { .hw = &mpll2.common.hw },
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson8b.c32 /* mux to choose between fclk_div2 (bit unset) and mpll2 (bit set) */
/linux/drivers/clk/meson/
H A Ds4-peripherals.c1924 { .fw_name = "mpll2", },
2050 { .fw_name = "mpll2", },
2355 { .fw_name = "mpll2", },
2680 { .fw_name = "mpll2", },
H A Daxg.c715 .name = "mpll2",
1005 * Following these parent clocks, we should also have had mpll2, mpll3
1877 * hifi_pll, mpll0, mpll1, mpll2, mpll3, fdiv4,
H A Ds4-pll.c700 .name = "mpll2",
H A Dgxbb.c967 .name = "mpll2",
1431 * Following these parent clocks, we should also have had mpll2, mpll3
2683 * vid_pll, vid2_pll (hevc), mpll0, mpll1, mpll2, fdiv4,
H A Dmeson8b.c663 .name = "mpll2",
1924 * parents are mpll1 and mpll2 but we need those for audio and
1979 * parents are mpll1 and mpll2 but we need those for audio and
H A Dg12a.c2449 .name = "mpll2",
2577 * Following these parent clocks, we should also have had mpll2, mpll3
/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-s4.dtsi125 "mpll2", "mpll3", "hdmi_pll", "xtal";
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi574 "mpll1", "mpll2", "mpll3", "mpll4",
/linux/drivers/soc/amlogic/
H A Dmeson-clk-measure.c648 CLK_MSR_ID(13, "mpll2"),
/linux/drivers/clk/sophgo/
H A Dclk-sg2044.c445 { .fw_name = "mpll2" },