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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - J. Neuschäfer <j.ne@posteo.net>
14 controlling chip-wide low-power states as well as peripheral clock gating.
17 example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are
20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that
25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of
27 resume. The first two cells are as described for fsl,mpc8548-pmc. This
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/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8536si-post.dtsi2 * MPC8536 Silicon/SoC Device Tree Source (post include)
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
44 compatible = "fsl,mpc8540-pci";
47 bus-range = <0 0xff>;
48 #interrupt-cells = <1>;
49 #size-cells = <2>;
50 #address-cells = <3>;
55 compatible = "fsl,mpc8548-pcie";
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H A Dp1022si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
39 * The localbus on the P1022 is not a simple-bus because of the eLBC
42 compatible = "fsl,p1022-elbc", "fsl,elbc";
49 compatible = "fsl,mpc8548-pcie";
51 #size-cells = <2>;
52 #address-cells = <3>;
53 bus-range = <0 255>;
54 clock-frequency = <33333333>;
59 #interrupt-cells = <1>;
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