Searched +full:mpc8313 +full:- +full:wakeup +full:- +full:timer (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - J. Neuschäfer <j.ne@posteo.net> 14 controlling chip-wide low-power states as well as peripheral clock gating. 20 For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that 25 For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of 27 resume. The first two cells are as described for fsl,mpc8548-pmc. This 31 For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one 33 into DEVDISR2, if present -- this cell should be zero or absent if the [all …]
|
| /linux/arch/powerpc/boot/dts/ |
| H A D | mpc8313erdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <0>; 31 d-cache-line-size = <32>; 32 i-cache-line-size = <32>; 33 d-cache-size = <16384>; 34 i-cache-size = <16384>; [all …]
|
| H A D | mpc8315erdb.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /dts-v1/; 9 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 27 #address-cells = <1>; 28 #size-cells = <0>; 33 d-cache-line-size = <32>; 34 i-cache-line-size = <32>; 35 d-cache-size = <16384>; [all …]
|