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/linux/Documentation/devicetree/bindings/timer/
H A Dmrvl,mmp-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/mrvl,mmp-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP Timer
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
11 - Thomas Gleixner <tglx@linutronix.de>
12 - Rob Herring <robh@kernel.org>
16 pattern: '^timer@[a-f0-9]+$'
19 const: mrvl,mmp-timer
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/linux/arch/arm/boot/dts/marvell/
H A Dpxa910.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa910.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
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H A Dpxa168.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,pxa168.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <1>;
24 compatible = "simple-bus";
25 interrupt-parent = <&intc>;
29 compatible = "mrvl,axi-bus", "simple-bus";
30 #address-cells = <1>;
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H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
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H A Dmmp2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/marvell,mmp2.h>
8 #include <dt-bindings/power/marvell,mmp2.h>
9 #include <dt-bindings/clock/marvell,mmp2-audio.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "simple-bus";
28 interrupt-parent = <&intc>;
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/linux/Documentation/filesystems/ext4/
H A Dmmp.rst1 .. SPDX-License-Identifier: GPL-2.0
4 -------------------------
6 Multiple mount protection (MMP) is a feature that protects the
9 etc.), the MMP code running on the node (call it node A) checks a
13 open code will wait for twice the specified MMP check interval and check
15 filesystem is active on another machine and the open fails. If the MMP
16 code passes all of those checks, a new MMP sequence number is generated
17 and written to the MMP block, and the mount proceeds.
19 While the filesystem is live, the kernel sets up a timer to re-check the
20 MMP block at the specified MMP check interval. To perform the re-check,
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/linux/arch/arm/mach-mmp/
H A Dtime.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-mmp/time.c
10 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com>
11 * 2008-10-08: Bin Yang <bin.yang@marvell.com>
13 * The timers module actually includes three timers, each timer with up to
14 * three match comparators. Timer #0 is used here in free-running mode as
32 #include "regs-timers.h"
33 #include <linux/soc/mmp/cputype.h>
41 * Read the timer through the CVWR register. Delay is required after requesting
52 while (delay--) in timer_read()
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/linux/fs/ext4/
H A Dext4.h1 // SPDX-License-Identifier: GPL-2.0
7 * Laboratoire MASI - Institut Blaise Pascal
30 #include <linux/timer.h>
38 #include <linux/percpu-rwsem.h>
61 * with DOUBLE_CHECK defined mballoc creates persistent in-core
77 printk(KERN_DEBUG "EXT4-fs DEBUG (%s, %d): %s:", \
95 pr_debug("[%s/%d] EXT4-fs (%s): ino %lu: (%s, %d): %s:" fmt, \
96 current->comm, task_pid_nr(current), \
97 ino->i_sb->s_id, ino->i_ino, __FILE__, __LINE__, \
116 /* data type for filesystem-wide blocks number */
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/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
159 The ARM series is a line of low-power-consumption RISC chip designs
161 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
162 manufactured, but legacy ARM-based PC hardware remains popular in
173 supported in LLD until version 14. The combined range is -/+ 256 MiB,
266 Patch phys-to-virt and virt-to-phys translation functions at
270 This can only be used with non-XIP MMU kernels where the base
316 bool "MMU-based Paged Memory Management Support"
319 Select if you want MMU-based virtualised addressing space
354 # This is sorted alphabetically by mach-* pathname. However, plat-*
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/linux/include/linux/
H A Dskbuff.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
7 * Florian La Roche, <rzsfl@rz.uni-sb.de>
28 #include <linux/dma-mapping.h>
39 #include <net/dropreason-core.h>
56 * .. flat-table:: Checksum related device features
59 * * - %NETIF_F_HW_CSUM
60 * - The driver (or its device) is able to compute one
66 * * - %NETIF_F_IP_CSUM
67 * - Driver (device) is only able to checksum plain
76 * * - %NETIF_F_IPV6_CSUM
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/linux/
H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
47 D: in-kernel DRM Maintainer
72 E: tim_alpaerts@toyota-motor-europe.com
76 S: B-2610 Wilrijk-Antwerpen
81 W: http://www-stu.christs.cam.ac.uk/~aia21/
102 D: Maintainer of ide-cd and Uniform CD-ROM driver,
103 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
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H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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