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/linux/Documentation/devicetree/bindings/mmc/
H A Dloongson,ls2k0500-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/loongson,ls2k0500-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The SD/SDIO/eMMC host controller for Loongson-2K family SoCs
10 The MMC host controller on the Loongson-2K0500/2K1000 (using an externally
11 shared apbdma controller) provides the SD and SDIO device interfaces.
12 The two MMC host controllers on the Loongson-2K2000 are similar,
13 except that they use internal exclusive DMA. one controller provides
17 - Binbin Zhou <zhoubinbin@loongson.cn>
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H A Damlogic,meson-gx-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic SD / eMMC controller for S905/GXBB family SoCs
10 The MMC 5.1 compliant host controller on Amlogic provides the
14 - Neil Armstrong <neil.armstrong@linaro.org>
17 - $ref: mmc-controller.yaml#
22 - const: amlogic,meson-axg-mmc
23 - items:
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H A Dstarfive,jh7110-mmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive Designware Mobile Storage Host Controller
10 StarFive uses the Synopsys designware mobile storage host controller
11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
14 - $ref: synopsys-dw-mshc-common.yaml#
17 - William Qiu <william.qiu@starfivetech.com>
21 const: starfive,jh7110-mmc
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H A Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller & Slots Common Properties
10 - Ulf Hansson <ulf.hansson@linaro.org>
13 These properties are common to multiple MMC host controllers and the
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
22 "#size-cells":
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H A Dcavium-mmc.txt1 * Cavium Octeon & ThunderX MMC controller
3 The highspeed MMC host controller on Caviums SoCs provides an interface
4 for MMC and SD types of memory cards.
10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
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H A Dsunplus,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mmc/sunplus,mmc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus MMC Controller
11 - Tony Huang <tonyhuang.sunplus@gmail.com>
12 - Li-hao Kuo <lhjeff911@gmail.com>
15 - $ref: mmc-controller.yaml
20 - sunplus,sp7021-mmc
35 - compatible
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H A Dmxs-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/mxs-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale MXS MMC controller
10 - Shawn Guo <shawnguo@kernel.org>
13 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
14 to support MMC, SD, and SDIO types of memory cards.
16 This file documents differences between the core properties in mmc.txt
20 - $ref: mmc-controller-common.yaml#
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H A Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MTK MSDC Storage Host Controller
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
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H A Dti-omap.txt1 * TI MMC host controller for OMAP1 and 2420
3 The MMC Host Controller on TI OMAP1 and 2420 family provides
4 an interface for MMC, SD, and SDIO types of memory cards.
7 by mmc.txt and the properties used by the omap mmc driver.
13 - compatible: Must be "ti,omap2420-mmc", for OMAP2420 controllers
14 - ti,hwmods: For 2420, must be "msdi<n>", where n is controller
19 msdi1: mmc@4809c000 {
20 compatible = "ti,omap2420-mmc";
25 dma-names = "tx", "rx";
H A Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
4 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
9 to set the internal glue logic used for configuring the MMC
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
[all …]
H A Ddavinci_mmc.txt1 * TI Highspeed MMC host controller for DaVinci
3 The Highspeed MMC Host Controller on TI DaVinci family
4 provides an interface for MMC, SD and SDIO types of memory cards.
9 - compatible:
10 Should be "ti,da830-mmc": for da830, da850, dm365
11 Should be "ti,dm355-mmc": for dm355, dm644x
14 - bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
15 - max-frequency: Maximum operating clock frequency, default 25MHz.
16 - dmas: List of DMA specifiers with the controller specific format
19 - dma-names: RX and TX DMA request names. These strings correspond
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Xenon SDHCI Controller
10 This file documents differences between the core MMC properties described by
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
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H A Dowl-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/owl-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Actions Semi Owl SoCs SD/MMC/SDIO controller
10 - $ref: mmc-controller.yaml
13 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
18 - const: actions,owl-mmc
19 - items:
20 - enum:
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H A Dsprd,sdhci-r11.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Spreadtrum SDHCI controller
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
16 const: sprd,sdhci-r11
27 - description: SDIO source clock
[all …]
H A Damlogic,meson-mx-sdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson SDHC controller
10 - $ref: mmc-controller.yaml
13 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
17 card interface with 1/4/8-bit bus width.
23 - enum:
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H A Dmoxa,moxart-mmc.txt1 MOXA ART MMC Host Controller Interface
3 Inherits from mmc binding[1].
5 [1] Documentation/devicetree/bindings/mmc/mmc.txt
9 - compatible : Must be "moxa,moxart-mmc" or "faraday,ftsdc010"
10 - reg : Should contain registers location and length
11 - interrupts : Should contain the interrupt number
12 - clocks : Should contain phandle for the clock feeding the MMC controller
16 - dmas : Should contain two DMA channels, line request number must be 5 for
18 - dma-names : Must be "tx", "rx"
22 mmc: mmc@98e00000 {
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H A Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs MMC Controller
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
[all …]
H A Dfsl-imx-mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-mmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Secure Digital Host Controller for i.MX2/3 series
10 - Markus Pargmann <mpa@pengutronix.de>
13 - $ref: mmc-controller.yaml
18 - const: fsl,imx21-mmc
19 - const: fsl,imx31-mmc
20 - items:
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/linux/Documentation/devicetree/bindings/dma/
H A Dstericsson,dma40.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DMA40 DMA Engine
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: dma-controller.yaml#
16 "#dma-cells":
22 0: SPI controller 0
23 1: SD/MMC controller 0 (unused)
24 2: SD/MMC controller 1 (unused)
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/linux/arch/mips/boot/dts/ingenic/
H A Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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H A Dx1830.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,tcu.h>
3 #include <dt-bindings/clock/ingenic,x1830-cgu.h>
4 #include <dt-bindings/dma/x1830-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu2.0-mxu2.0";
21 clock-names = "cpu";
[all …]
/linux/drivers/mmc/host/
H A Dsdricoh_cs.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
25 #include <linux/mmc/host.h>
26 #include <linux/mmc/mmc.h>
70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
77 /* mmc privdata */
80 struct mmc_host *mmc; /* MMC structure */ member
91 unsigned int value = readl(host->iobase + reg); in sdricoh_readl()
92 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value); in sdricoh_readl()
[all …]
H A Dushc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * USB SD Host Controller (USHC) controller driver.
8 * - Only version 2 devices are supported.
9 * - Version 2 devices only support SDIO cards/devices (R2 response is
13 * [USHC] USB SD Host Controller specification (CS-118793-SP)
19 #include <linux/dma-mapping.h>
20 #include <linux/mmc/host.h>
91 struct mmc_host *mmc; member
121 return usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0), in ushc_hw_reset()
131 ret = usb_control_msg(ushc->usb_dev, usb_rcvctrlpipe(ushc->usb_dev, 0), in ushc_hw_get_caps()
[all …]
/linux/arch/arm/boot/dts/actions/
H A Dowl-s500.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright (c) 2016-2017 Andreas Färber
8 #include <dt-bindings/clock/actions,s500-cmu.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/owl-s500-powergate.h>
12 #include <dt-bindings/reset/actions,s500-reset.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
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/linux/arch/arm64/boot/dts/sprd/
H A Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
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