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/linux/arch/arm/boot/dts/st/
H A Dstm32mp15x-mecio1-io.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include "stm32mp15-pinctrl.dtsi"
9 #include "stm32mp15xxaa-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
15 stdout-path = "serial0:1500000n8";
34 reserved-memory {
35 #address-cells = <1>;
36 #size-cells = <1>;
40 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
H A Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
18 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
25 stdout-path = "serial0:115200n8";
[all …]
H A Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp135f-dhcor-dhsbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG
7 * DHCOR PCB number: 718-100 or newer
8 * DHSBC PCB number: 719-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
16 #include "stm32mp13xx-dhcor-som.dtsi"
20 compatible = "dh,stm32mp135f-dhcor-dhsbc",
21 "dh,stm32mp135f-dhcor-som",
32 stdout-path = "serial0:115200n8";
[all …]
H A Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
24 reserved-memory {
25 #address-cells = <1>;
26 #size-cells = <1>;
30 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp135f-dk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
15 #include "stm32mp13-pinctrl.dtsi"
18 model = "STMicroelectronics STM32MP135F-DK Discovery Board";
19 compatible = "st,stm32mp135f-dk", "st,stm32mp135";
[all …]
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
[all …]
H A Dfsl,vf610-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
18 - items:
19 - enum:
20 - fsl,imx6sx-adc
21 - fsl,imx6ul-adc
22 - const: fsl,vf610-adc
[all …]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
/linux/tools/perf/scripts/python/
H A Dpowerpc-hcalls.py1 # SPDX-License-Identifier: GPL-2.0+
13 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
21 # 'min': minimum time nsec
22 # 'max': maximum time nsec
23 # 'time': average time nsec
159 print_ptrn = '%-28s%10s%10s%10s%10s'
162 print(print_ptrn % ('hcall', 'count', 'min(ns)', 'max(ns)', 'avg(ns)'))
163 print('-' * 68)
166 time = output[opcode]['time']
168 min_t = output[opcode]['min']
[all …]
H A Dparallel-perf.py2 # SPDX-License-Identifier: GPL-2.0
5 # options --cpu and --time so that each job processes a different chunk
14 import time
20 glb_prog_name = "parallel-perf.py"
88 return [ f"Non-empty error file {self.stderr_name}" ]
139 x = "0" * (10 - len(x)) + x
140 return x[:len(x) - 9] + "." + x[-9:]
150 max_len = len(str(cpus[-1]))
151 cpu_dir_fmt = f"cpu-%.{max_len}u"
157 cpu_option = f"--cpu={cpu}"
[all …]
H A Dtask-analyzer.py1 # task-analyzer.py - comprehensive perf tasks analysis
2 # SPDX-License-Identifier: GPL-2.0
8 # perf record -e sched:sched_switch -a -- sleep 10
9 # perf script report task-analyzer
21 os.environ["PERF_EXEC_PATH"] + "/scripts/python/Perf-Trace-Util/lib/Perf/Trace"
44 LEN_COMM = len("max-comms-length") # 16
75 """user enforced no-color or if stdout is no tty we disable colors"""
93 "--time-limit",
96 "print tasks only in time[s] window e.g"
97 " --time-limit 123.111:789.222(print all between 123.111 and 789.222)"
[all …]
/linux/include/uapi/sound/
H A Dasound.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Advanced Linux Sound Architecture - ALSA - Driver
4 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
5 * Abramo Bagnara <abramo@alsa-project.org>
21 #include <time.h>
54 * CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort *
60 unsigned char db2_sf_ss; /* sample frequency and size */
63 unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
68 * Section for driver hardware dependent interface - /dev/snd/hw? *
91 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
[all …]
/linux/tools/perf/trace/beauty/include/uapi/sound/
H A Dasound.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Advanced Linux Sound Architecture - ALSA - Driver
4 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
5 * Abramo Bagnara <abramo@alsa-project.org>
21 #include <time
395 unsigned int min, max; global() member
1128 long min; /* R: minimum value */ global() member
1133 long long min; /* R: minimum value */ global() member
[all...]
/linux/tools/include/uapi/sound/
H A Dasound.h
/linux/tools/perf/
H A Dbuiltin-kvm.c1 // SPDX-License-Identifier: GPL-2.0
5 #include "util/build-id.h"
16 #include <subcmd/parse-options.h>
17 #include "util/trace-event.h"
21 #include "util/synthetic-events.h"
24 #include "util/ordered-events.h"
25 #include "util/kvm-stat.h"
36 #include <sys/time.h>
59 if (vcpu == -1) \
60 return event->total.field; \
[all …]
/linux/kernel/time/
H A Dntp.c1 // SPDX-License-Identifier: GPL-2.0
5 * This code was mainly moved from kernel/timer.c and kernel/time.c
16 #include <linux/time.h>
49 * phase-lock loop variables
62 /* time adjustment (nsecs): */
65 /* pll time constant: */
77 /* time at last adjustment (secs): */
82 /* constant (boot-param configurable) NTP tick adjustment (upscaled) */
91 * The following variables are used when a pulse-per-second (PPS) signal
97 #define PPS_INTMIN 2 /* min freq interval (s) (shift) */
[all …]
/linux/drivers/mmc/host/
H A Ddw_mmc-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
44 static int rockchip_mmc_get_internal_phase(struct dw_mci *host, bool sample) in rockchip_mmc_get_internal_phase() argument
46 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_get_internal_phase()
55 if (sample) in rockchip_mmc_get_internal_phase()
76 static int rockchip_mmc_get_phase(struct dw_mci *host, bool sample) in rockchip_mmc_get_phase() argument
78 struct dw_mci_rockchip_priv_data *priv = host->priv; in rockchip_mmc_get_phase()
79 struct clk *clock = sample ? priv->sample_clk : priv->drv_clk; in rockchip_mmc_get_phase()
[all …]
/linux/drivers/spi/
H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
18 #include <linux/spi/spi-mem.h>
23 #include "spi-dw.h"
32 u32 rx_sample_dly; /* RX sample delay */
66 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
67 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
69 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
70 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
71 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
[all …]
/linux/tools/perf/Documentation/
H A Dperf-report.txt1 perf-report(1)
5 ----
6 perf-report - Read perf.data (created by perf record) and display the profile
9 --------
11 'perf report' [-i <file> | --input=file]
14 -----------
19 -------
20 -i::
21 --input=::
24 -v::
[all …]

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