Home
last modified time | relevance | path

Searched +full:mii +full:- +full:g +full:- +full:rt (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
32 dma-names:
[all …]
/linux/Documentation/devicetree/bindings/soc/ti/
H A Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654-idk.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "k3-pinctrl.h"
17 ethernet3 = "/icssg0-eth/ethernet-ports/port@0";
18 ethernet4 = "/icssg0-eth/ethernet-ports/port@1";
19 ethernet5 = "/icssg1-eth/ethernet-ports/port@0";
20 ethernet6 = "/icssg1-eth/ethernet-ports/port@1";
[all …]
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
H A Dk3-am642-phyboard-electra-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phyboard-am64x
13 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/leds/leds-pca9532.h>
19 #include <dt-bindings/phy/phy.h>
[all …]
H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
H A Dk3-am65-iot2050-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) Siemens AG, 2018-2024
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/net/ti-dp83867.h>
36 stdout-path = "serial3:115200n8";
39 reserved-memory {
40 #address-cells = <2>;
41 #size-cells = <2>;
44 secure_ddr: secure-ddr@9e800000 {
[all …]
H A Dk3-am642-sr-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2023 Josua Mayer <josua@solid-run.com>
7 #include <dt-bindings/net/ti-dp83869.h>
11 compatible = "solidrun,am642-sr-som", "ti,am642";
24 stdout-path = "serial2:115200n8";
29 compatible = "ti,am642-icssg-prueth";
30 pinctrl-names = "default";
31 pinctrl-0 = <&pru_rgmii1_default_pins>, <&pru_rgmii2_default_pins>;
35 firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
36 "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
[all …]
H A Dk3-am642-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,am642-evm", "ti,am642";
[all …]
H A Dk3-am642-tqma64xxl-mbax4xxl.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pwm/pwm.h>
[all …]
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_prueth_sr1.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
26 #include "../k3-cppi-desc-pool.h"
34 * situation. So use Q0-Q2 as data queues and Q3 as management queue
62 config.addr_lo = cpu_to_le32(lower_32_bits(prueth->msmcram.pa)); in icssg_config_sr1()
63 config.addr_hi = cpu_to_le32(upper_32_bits(prueth->msmcram.pa)); in icssg_config_sr1()
64 config.rx_flow_id = cpu_to_le32(emac->rx_flow_id_base); /* flow id for host port */ in icssg_config_sr1()
65 config.rx_mgr_flow_id = cpu_to_le32(emac->rx_mgm_flow_id_base); /* for mgm ch */ in icssg_config_sr1()
69 index = i - PRUETH_EMAC_BUF_POOL_START_SR1; in icssg_config_sr1()
73 va = prueth->shram.va + slice * ICSSG_CONFIG_OFFSET_SLICE1; in icssg_config_sr1()
[all …]
H A Dicssg_prueth.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
12 #include <linux/dma-mapping.h>
13 #include <linux/dma/ti-cppi5.h>
19 #include <linux/io-64-nonatomic-hi-lo.h>
37 #include "../k3-cppi-desc-pool.h"
56 struct prueth *prueth = emac->prueth; in emac_get_tx_ts()
65 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); in emac_get_tx_ts()
89 !emac->tx_ts_skb[tsr.cookie]) { in tx_ts_work()
90 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n", in tx_ts_work()
[all …]
/linux/drivers/net/bonding/
H A Dbond_main.c1 // SPDX-License-Identifier: GPL-1.0+
72 #include <linux/mii.h>
97 /*---------------------------- Module parameters ----------------------------*/
144 MODULE_PARM_DESC(use_carrier, "Use netif_carrier_ok (vs MII ioctls) in miimon; "
147 MODULE_PARM_DESC(mode, "Mode of operation; 0 for balance-rr, "
148 "1 for active-backup, 2 for balance-xor, "
149 "3 for broadcast, 4 for 802.3ad, 5 for balance-tlb, "
150 "6 for balance-alb");
172 MODULE_PARM_DESC(xmit_hash_policy, "balance-alb, balance-tlb, balance-xor, 802.3ad hashing method; "
187 MODULE_PARM_DESC(fail_over_mac, "For active-backup, do not set all slaves to "
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]