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/linux/Documentation/devicetree/bindings/power/supply/
H A Dbq25980.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <afd@ti.com>
15 for use in high-power density portable electronics. These inductorless
20 - $ref: power-supply.yaml#
25 - ti,bq25980
26 - ti,bq25975
27 - ti,bq25960
32 ti,watchdog-timeout-ms:
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/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max8997.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 motor driver, flash LED driver and Micro-USB Interface Controller.
22 const: maxim,max8997-pmic
24 charger-supply:
30 - description: irq1 interrupt
31 - description: alert interrupt
33 max8997,pmic-buck1-dvs-voltage:
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/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v14_0_2_pptable.h2 * Copyright 2023 Advanced Micro Devices, Inc.
43 // SMU_14_0_2_PP_THERMALCONTROLLER - Thermal Controller Type
68 …NGINE = 1 << SMU_14_0_2_ODCAP_AUTO_UV_ENGINE, // Auto Under Volt GFXCLK
74 …UV = 1 << SMU_14_0_2_ODCAP_AUTO_SOC_UV, // Auto Unver Volt VDDSOC
169 … // PPTable_t in driver_if.h -- as requested by PMFW, this offset should start a…
H A Dsmu_v11_0_pptable.h2 * Copyright 2018 Advanced Micro Devices, Inc.
37 // SMU_11_0_PP_THERMALCONTROLLER - Thermal Controller Type
72 …TO_UV_ENGINE = 1 << SMU_11_0_ODCAP_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK feature
H A Dsmu_v13_0_pptable.h2 * Copyright 2020 Advanced Micro Devices, Inc.
37 // SMU_13_0_PP_THERMALCONTROLLER - Thermal Controller Type
72 …TO_UV_ENGINE = 1 << SMU_13_0_ODCAP_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK feature
H A Dsmu_v13_0_7_pptable.h2 * Copyright 2022 Advanced Micro Devices, Inc.
37 // SMU_13_0_7_PP_THERMALCONTROLLER - Thermal Controller Type
74 …V_ENGINE = 1 << SMU_13_0_7_ODCAP_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK feature
H A Dsmu_v11_0_7_pptable.h2 * Copyright 2020 Advanced Micro Devices, Inc.
37 // SMU_11_0_7_PP_THERMALCONTROLLER - Thermal Controller Type
75 …UV_ENGINE = 1 << SMU_11_0_7_ODCAP_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK feature
/linux/drivers/opp/
H A Dof.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Texas Instruments Incorporated.
34 /* "operating-points-v2" can be an array for power domain providers */ in _opp_of_get_opp_desc_node()
35 return of_parse_phandle(np, "operating-points-v2", index); in _opp_of_get_opp_desc_node()
41 return _opp_of_get_opp_desc_node(dev->of_node, 0); in dev_pm_opp_of_get_opp_desc_node()
50 np = _opp_of_get_opp_desc_node(dev->of_node, index); in _managed_opp()
55 if (opp_table->np == np) { in _managed_opp()
58 * so will have same node-pointer, np. in _managed_opp()
61 * OPP table contains a "opp-shared" property. in _managed_opp()
63 if (opp_table->shared_opp == OPP_TABLE_ACCESS_SHARED) in _managed_opp()
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/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator_v.c2 * Copyright 2017 Advanced Micro Devices, Inc.
42 tg->ctx->logger
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
94 * tg->funcs->disable_stereo(tg); in dce110_timing_generator_v_disable_crtc()
102 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc()
116 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_v_blank_crtc()
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H A Ddce110_timing_generator.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
48 #define CRTC_REG(reg) (reg + tg110->offsets.crtc)
49 #define DCP_REG(reg) (reg + tg110->offsets.dcp)
69 if (timing->flags.INTERLACE == 1) { in dce110_timing_generator_apply_front_porch_workaround()
70 if (timing->v_front_porch < 2) in dce110_timing_generator_apply_front_porch_workaround()
71 timing->v_front_porch = 2; in dce110_timing_generator_apply_front_porch_workaround()
73 if (timing->v_front_porch < 1) in dce110_timing_generator_apply_front_porch_workaround()
74 timing->v_front_porch = 1; in dce110_timing_generator_apply_front_porch_workaround()
100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
113 regval = dm_read_reg(tg->ctx, address); in dce110_timing_generator_set_early_control()
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/linux/drivers/regulator/
H A Dti-abb-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Copyright (C) 2012-2013 Texas Instruments, Inc.
26 * FAST_OPP: sets ABB LDO to Forward Body-Bias
27 * SLOW_OPP: sets ABB LDO to Reverse Body-Bias
34 * struct ti_abb_info - ABB information per voltage setting
47 * struct ti_abb_reg - Register description for ABB block
50 * @sr2_wtcnt_value_mask: setup register- sr2_wtcnt_value mask
51 * @fbb_sel_mask: setup register- FBB sel mask
52 * @rbb_sel_mask: setup register- RBB sel mask
53 * @sr2_en_mask: setup register- enable mask
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/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/usb/pd.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/i2c/i2c.h>
14 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
29 iio-hwmon {
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/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
43 generic_reg_update_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)
46 generic_reg_set_soc15(tg110->base.ctx, tg110->offsets.crtc, reg_name, n, __VA_ARGS__)
91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
93 tg110->offsets.crtc); in dce120_timing_generator_is_in_vertical_blank()
106 uint32_t interlace_factor = timing->flags.INTERLACE ? 2 : 1; in dce120_timing_generator_validate_timing()
108 (timing->v_total - timing->v_addressable - in dce120_timing_generator_validate_timing()
109 timing->v_border_top - timing->v_border_bottom) * in dce120_timing_generator_validate_timing()
120 if (v_blank < tg110->min_v_blank || in dce120_timing_generator_validate_timing()
121 timing->h_sync_width < tg110->min_h_sync_width || in dce120_timing_generator_validate_timing()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-midas.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
14 #include "exynos4412-ppmu-common.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/clock/maxim,max77686.h>
20 #include "exynos-pinctrl.h"
34 stdout-path = &serial_2;
38 compatible = "samsung,secure-firmware";
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