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/linux/Documentation/devicetree/bindings/memory-controllers/ddr/
H A Djedec,lpddr-channel.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
24 - jedec,lpddr5-channel
26 io-width:
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dti-aemif.txt3 The Async External Memory Interface (EMIF16/AEMIF) controller is intended to
4 provide a glue-less interface to a variety of asynchronous memory devices like
5 ASRA M, NOR and NAND memory. A total of 256M bytes of any of these memories
11 Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf
12 OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
13 Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
17 - compatible: "ti,davinci-aemif"
18 "ti,keystone-aemif"
19 "ti,da850-aemif"
21 - reg: contains offset/length value for AEMIF control registers
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H A Datmel,ebi.txt5 The EBI provides a glue-less interface to asynchronous memories through the SMC
6 (Static Memory Controller).
10 - compatible: "atmel,at91sam9260-ebi"
11 "atmel,at91sam9261-ebi"
12 "atmel,at91sam9263-ebi0"
13 "atmel,at91sam9263-ebi1"
14 "atmel,at91sam9rl-ebi"
15 "atmel,at91sam9g45-ebi"
16 "atmel,at91sam9x5-ebi"
17 "atmel,sama5d3-ebi"
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H A Darm,pl172.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl172.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PL172/PL175/PL176 MultiPort Memory Controller
10 - Frank Li <Frank.Li@nxp.com>
18 - arm,pl172
19 - arm,pl175
20 - arm,pl176
22 - compatible
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/linux/Documentation/devicetree/bindings/bus/
H A Dnvidia,tegra20-gmi.txt1 Device tree bindings for NVIDIA Tegra Generic Memory Interface bus
3 The Generic Memory Interface bus enables memory transfers between internal and
4 external memory. Can be used to attach various high speed devices such as
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
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/linux/drivers/mtd/maps/
H A Dpismo.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * PISMO memory driver - http://www.pismoworld.org/
15 #include <linux/mtd/plat-ram.h>
22 u8 width; member
39 u8 width; member
52 struct i2c_client *client = to_i2c_client(pdev->dev.parent); in pismo_set_vpp()
55 pismo->vpp(pismo->vpp_data, on); in pismo_set_vpp()
58 static unsigned int pismo_width_to_bytes(unsigned int width) in pismo_width_to_bytes() argument
60 width &= 15; in pismo_width_to_bytes()
61 if (width > 2) in pismo_width_to_bytes()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Support non-linear mappings of flash chips"
13 tristate "Flash device in physical memory map"
18 physically into the CPU's memory. You will need to configure
20 particular board as well as the bus width, either statically
21 with config options or at run-time.
42 This is the physical memory location at which the flash chips
44 memory map which should hopefully be in the documentation for
54 physical memory map between the chips, this could be larger
55 than the total amount of flash present. Refer to the memory
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H A Dscx200_docflash.c1 // SPDX-License-Identifier: GPL-2.0-only
4 Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
29 static unsigned width = 8; /* Default to 8 bits wide */ variable
36 module_param(width, int, 0);
37 MODULE_PARM_DESC(width, "Data width of the flash mapping (8/16)");
89 return -ENODEV; in init_scx200_docflash()
94 return -ENODEV; in init_scx200_docflash()
108 return -ENODEV; in init_scx200_docflash()
115 return -ENODEV; in init_scx200_docflash()
118 width = 16; in init_scx200_docflash()
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/linux/Documentation/devicetree/bindings/dma/xilinx/
H A Dxlnx,zynqmp-dma-1.0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Xilinx ZynqMP DMA engine supports memory to memory transfers,
11 memory to device and device to memory transfers. It also has flow
15 - Michael Tretter <m.tretter@pengutronix.de>
16 - Harini Katakam <harini.katakam@amd.com>
17 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
20 - $ref: ../dma-controller.yaml#
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/linux/drivers/edac/
H A Dsynopsys_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2012 - 2014 Xilinx, Inc.
19 /* Number of cs_rows needed per memory controller */
22 /* Number of channels per memory controller */
33 /* Synopsys DDR memory controller registers that are relevant to ECC */
94 /* ZynqMP Enhanced DDR memory controller registers that are relevant to ECC */
143 /* DDR Control Register width definitions */
193 /* DDR Memory type defines */
268 * struct ecc_error_info - ECC error log information.
288 * struct synps_ecc_status - ECC status information to report.
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H A Di10nm_base.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Intel(R) 10nm server memory controller.
11 #include <asm/intel-family.h>
24 pci_read_config_dword((d)->uracu, 0xd0, &(reg))
26 pci_read_config_dword((d)->uracu, \
27 (res_cfg->type == GNR ? 0xd4 : 0xd8) + (i) * 4, &(reg))
29 pci_read_config_dword((d)->sad_all, (offset) + (i) * \
30 (res_cfg->type == GNR ? 12 : 8), &(reg))
32 pci_read_config_dword((d)->uracu, 0xd4, &(reg))
34 pci_read_config_dword((d)->pcu_cr3, \
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/linux/include/video/
H A Ds1d13xxxfb.h4 * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
33 #define S1DREG_CLK_CNF 0x0010 /* Memory Clock Configuration Register */
37 #define S1DREG_CPU2MEM_WST_SEL 0x001E /* CPU To Memory Wait State Select Register */
38 #define S1DREG_MEM_CNF 0x0020 /* Memory Configuration Register */
44 #define S1DREG_LCD_DISP_HWIDTH 0x0032 /* LCD Horizontal Display Width Register: ((val)+1)*8)=pix/l…
45 #define S1DREG_LCD_NDISP_HPER 0x0034 /* LCD Horizontal Non-Display Period Register: ((val)+1)*8)=N…
47 #define S1DREG_TFT_FPLINE_PWIDTH 0x0036 /* TFT FPLINE Pulse Width Register. */
50 #define S1DREG_LCD_NDISP_VPER 0x003A /* LCD Vertical Non-Display Period Register: (val)+1=NDlines …
52 #define S1DREG_TFT_FPFRAME_PWIDTH 0x003C /* TFT FPFRAME Pulse Width Register */
58 #define S1DREG_LCD_MEM_OFF0 0x0046 /* LCD Memory Address Offset Register 0 */
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/linux/drivers/pcmcia/
H A Dsoc_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
66 * common and attribute memory write timing) says that twWE has a
73 * When configuring memory maps, Card Services appears to adopt the policy
74 * that a memory access time of "0" means "use the default." The default
75 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
76 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
77 * memory command width time is 300ns.
85 * The socket driver actually works nicely in interrupt-driven form,
91 /* I/O pins replacing memory pins
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/linux/Documentation/userspace-api/media/v4l/
H A Dselection-api-configuration.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
20 :ref:`constraint flags <v4l2-selection-flags>`.
26 See figure :ref:`sel-targets-capture` for examples of the selection
30 The range of coordinates of the top left corner, width and height of
36 The top left corner, width and height of the source rectangle, that is
49 The composing targets refer to a memory buffer. The limits of composing
52 must be located at position ``(0,0)``. The width and height are equal to
63 :ref:`constraint flags <v4l2-selection-flags>`.
84 image into a video signal. The cropping rectangles refer to a memory
88 The cropping targets refer to the memory buffer that contains an image
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H A Ddev-overlay.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
11 Video overlay devices have the ability to genlock (TV-)video into the
12 (VGA-)video signal of a graphics card, or to store captured images
13 directly in video memory of a graphics card, typically with clipping.
43 advantage of memory mapping and DMA.
62 :ref:`streaming parameter <streaming-par>` ioctls as needed. The
77 privileged because it allows to set up DMA into physical memory,
78 bypassing the memory protection mechanisms of the kernel. Only the
93 1. Chroma-keying displays the overlaid image only where pixels in the
148 The scaling factor of the overlaid image is implied by the width and
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/linux/arch/arm/boot/dts/renesas/
H A Dr8a7743-iwg20m.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1M-20M Qseven SOM
9 #include <dt-bindings/gpio/gpio.h>
14 memory@40000000 {
15 device_type = "memory";
19 memory@200000000 {
20 device_type = "memory";
25 compatible = "regulator-fixed";
26 regulator-name = "3P3V";
27 regulator-min-microvolt = <3300000>;
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/linux/drivers/media/platform/ti/omap3isp/
H A Dispresizer.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - Resizer module
42 * "TRM ES3.1, table 12-46"
59 * 7-tap mode is for scale factors 0.25x to 0.5x.
60 * 4-tap mode is for scale factors 0.5x to 4.0x.
64 /* For 8-phase 4-tap horizontal filter: */
75 /* For 8-phase 4-tap vertical filter: */
86 /* For 4-phase 7-tap horizontal filter: */
94 /* For 4-phase 7-tap vertical filter: */
102 * The dummy padding is required in 7-tap mode because of how the
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/linux/Documentation/userspace-api/
H A Ddma-buf-alloc-exchange.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. Copyright 2021-2023 Collabora Ltd.
9 support for sharing pixel-buffer allocations between processes, devices, and
12 approach this sharing for two-dimensional image data.
25 Conceptually a two-dimensional array of pixels. The pixels may be stored
26 in one or more memory buffers. Has width and height in pixels, pixel
30 A span along a single y-axis value, e.g. from co-ordinates (0,100) to
37 A span along a single x-axis value, e.g. from co-ordinates (100,0) to
40 memory buffer:
41 A piece of memory for storing (parts of) pixel data. Has stride and size
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/linux/drivers/acpi/acpica/
H A Dexregion.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: exregion - ACPI default op_region (address space) handlers
6 * Copyright (C) 2000 - 2025, Intel Corp.
21 * PARAMETERS: function - Read or Write operation
22 * address - Where in the space to read or write
23 * bit_width - Field width in bits (8, 16, or 32)
24 * value - Pointer to in or out value
25 * handler_context - Pointer to Handler's context
26 * region_context - Pointer to context specific to the
31 * DESCRIPTION: Handler for the System Memory address space (Op Region)
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/linux/drivers/gpu/drm/xen/
H A Dxen_drm_front.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
4 * Xen para-virtual DRM device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
29 * Depending on the requirements for the para-virtualized environment, namely
38 * In this mode of operation driver allocates buffers from system memory.
42 * hardware can still reach display buffer memory while importing PRIME
49 * This mode of operation is run-time configured via guest domain configuration
56 * physically contiguous memory, this allows implementing zero-copying
57 * use-cases.
65 * backend exhausting its grant references and memory
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/linux/arch/arm/mach-sa1100/
H A Djornada720.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-sa1100/jornada720.c
17 #include <linux/platform_data/sa11x0-serial.h>
26 #include <asm/mach-types.h>
45 /* memory space (line 52 of HP's doc) */
62 {0x0010,0x01}, // Memory Clock Configuration Register
66 {0x001E,0x01}, // CPU To Memory Wait State Select Register
67 {0x0020,0x00}, // Memory Configuration Register
73 {0x0032,0x4F}, // LCD Horizontal Display Width Register
74 {0x0034,0x07}, // LCD Horizontal Non-Display Period Register
[all …]
/linux/include/acpi/
H A Dacpiosxf.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: acpiosxf.h - All interfaces to the OS Services Layer (OSL). These
8 * Copyright (C) 2000 - 2025, Intel Corp.
30 #define ACPI_NO_UNIT_LIMIT ((u32) -1)
168 * Memory allocation and mapping
179 void acpi_os_free(void *memory);
197 * Memory/Object Cache
264 * Platform and hardware-independent I/O interfaces
267 acpi_status acpi_os_read_port(acpi_io_address address, u32 *value, u32 width);
271 acpi_status acpi_os_write_port(acpi_io_address address, u32 value, u32 width);
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/linux/drivers/media/platform/ti/omap/
H A Domap_vout_vrfb.c17 #include <media/v4l2-device.h>
36 if (!vout->smsshado_virt_addr[i]) { in omap_vout_allocate_vrfb_buffers()
37 vout->smsshado_virt_addr[i] = in omap_vout_allocate_vrfb_buffers()
38 omap_vout_alloc_buffer(vout->smsshado_size, in omap_vout_allocate_vrfb_buffers()
39 &vout->smsshado_phy_addr[i]); in omap_vout_allocate_vrfb_buffers()
41 if (!vout->smsshado_virt_addr[i] && startindex != -1) { in omap_vout_allocate_vrfb_buffers()
42 if (vout->vq.memory == V4L2_MEMORY_MMAP && i >= startindex) in omap_vout_allocate_vrfb_buffers()
45 if (!vout->smsshado_virt_addr[i]) { in omap_vout_allocate_vrfb_buffers()
48 vout->smsshado_virt_addr[j], in omap_vout_allocate_vrfb_buffers()
49 vout->smsshado_size); in omap_vout_allocate_vrfb_buffers()
[all …]
/linux/include/linux/
H A Dntb.h8 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
22 * Copyright (C) 2016 T-Platforms. All Rights Reserved.
69 * enum ntb_topo - NTB connection topology
79 NTB_TOPO_NONE = -1,
113 * enum ntb_speed - NTB link training speed
122 NTB_SPEED_AUTO = -1,
131 * enum ntb_width - NTB link training width
132 * @NTB_WIDTH_AUTO: Request the max supported width.
133 * @NTB_WIDTH_NONE: Link is not trained to any width.
134 * @NTB_WIDTH_1: Link is trained to 1 lane width.
[all …]
/linux/tools/mm/
H A Dslabinfo-gnuplot.sh2 # SPDX-License-Identifier: GPL-2.0-only
9 # This program is intended to plot a `slabinfo -X' stats, collected,
11 # while [ 1 ]; do slabinfo -X >> stats; sleep 1; done
13 # Use `slabinfo-gnuplot.sh stats' to pre-process collected records
18 # size (-r %d,%d and -s %d,%d options).
21 # slabinfo-gnuplot.sh -t FILE1-totals FILE2-totals ... FILEN-totals
27 width=1500
33 echo "Usage: [-s W,H] [-r MIN,MAX] [-t|-l] FILE1 [FILE2 ..]"
34 echo "FILEs must contain 'slabinfo -X' samples"
35 echo "-t - plot totals for FILE(s)"
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