/freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbo [all...] |
H A D | omap-mailbox.txt | 17 and tx interrupt source per h/w fifo. Communication between different processors 18 is achieved through the appropriate programming of the rx and tx interrupt 25 routed to different processor sub-systems on DRA7xx as they are routed through 38 a SoC. The sub-mailboxes are represented as child nodes of this parent node. 41 -------------------- 42 - compatible: Should be one of the following, 43 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs 44 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs 45 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, 47 "ti,am654-mailbox" for K3 AM65x and J721E SoCs [all …]
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H A D | hisilicon,hi6220-mailbox.txt | 13 -------------------- 14 - compatible: Shall be "hisilicon,hi6220-mbox" 15 - reg: Contains the mailbox register address range (base 19 - #mbox-cells: Common mailbox binding property to identify the number 23 slot_id: Slot id used either for TX or RX 26 TX/RX interrupt to application processor, 28 - interrupts: Contains the interrupt information for the mailbox 33 -------------------- 34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver 36 flag" mode or IRQ generated mode to acknowledge a TX [all …]
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H A D | st,stm32-ipcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 16 - Fabien Dessenne <fabien.dessenne@foss.st.com> 17 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> 21 const: st,stm32mp1-ipcc 31 - description: rx channel occupied 32 - description: tx channel free 34 interrupt-names: [all …]
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H A D | arm,mhuv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tushar Khandelwal <tushar.khandelwal@arm.com> 11 - Viresh Kumar <viresh.kumar@linaro.org> 15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional 33 - Data-transfer: Each transfer is made of one or more words, using one or more 36 - Doorbell: Each transfer is made up of single bit flag, using any one of the 49 - arm,mhuv2-tx 50 - arm,mhuv2-rx [all …]
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H A D | xlnx,zynqmp-ipi-mailbox.txt | 8 +-------------------------------------+ 10 +-------------------------------------+ 11 +--------------------------------------------------+ 15 +--------------------------+ | 18 +--------------------------------------------------+ 19 +------------------------------------------+ 20 | +----------------+ +----------------+ | 24 | +----------------+ +----------------+ | 27 +------------------------------------------+ 33 -------------------- [all …]
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H A D | fsl,mu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 22 registers (Processor A-facing, Processor B-facing). 27 - const: fsl,imx6sx-mu 28 - const: fsl,imx7ulp-mu 29 - const: fsl,imx8ulp-mu 30 - const: fsl,imx8-mu-scu 31 - const: fsl,imx8-mu-seco [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am68-sk-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include "k3-j721s2.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 14 bootph-all; 20 reserved_memory: reserved-memory { 21 #address-cells = <2>; 22 #size-cells = <2>; 27 no-map; [all …]
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H A D | k3-am642-tqma64xxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (c) 2022-2024 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany. 7 #include "k3-am642.dtsi" 18 /* 1G RAM - default variant */ 23 reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 31 no-map; 34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { [all …]
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H A D | k3-j721e-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721e.dtsi" 15 bootph-all; 21 reserved_memory: reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 29 no-map; 32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { [all …]
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H A D | k3-j721s2-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include "k3-j721s2.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 16 bootph-all; 23 reserved_memory: reserved-memory { 24 #address-cells = <2>; 25 #size-cells = <2>; 31 no-map; [all …]
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H A D | k3-j784s4-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 /dts-v1/; 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include "k3-j784s4.dtsi" 15 compatible = "ti,j784s4-evm", "ti,j784s4"; 19 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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H A D | k3-am69-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include "k3-j784s4.dtsi" 16 compatible = "ti,am69-sk", "ti,j784s4"; 20 stdout-path = "serial2:115200n8"; 36 bootph-all; 42 reserved_memory: reserved-memory { [all …]
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H A D | k3-am64-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com 6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH 10 * https://www.phytec.com/product/phycore-am64x 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/net/ti-dp83867.h> 18 model = "PHYTEC phyCORE-AM64x"; 19 compatible = "phytec,am64-phycore-som", "ti,am642"; 32 reserved_memory: reserved-memory { [all …]
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H A D | k3-j721e-beagleboneai64.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * https://beagleboard.org/ai-64 4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation 6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation 9 /dts-v1/; 11 #include "k3-j721e.dtsi" 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> [all …]
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H A D | k3-j7200-som-p0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 10 #include "k3-j7200.dtsi" 15 bootph-all; 21 reserved_memory: reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 29 no-map; [all …]
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H A D | k3-am642-sk.dts | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 8 #include <dt-bindings/phy/phy.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/leds/common.h> 12 #include "k3-am642.dtsi" 14 #include "k3-serdes.h" 17 compatible = "ti,am642-sk", "ti,am642"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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H A D | dra72x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 20 compatible = "arm,cortex-a15-pmu"; 21 interrupt-parent = <&wakeupgen>; 27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */ 28 compatible = "ti,sysc-omap4", "ti,sysc"; 31 reg-names = "rev", "sysc"; 32 ti,sysc-midle = <SYSC_IDLE_FORCE>, 34 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 37 clock-names = "fck"; [all …]
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H A D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; 41 interrupt-parent = <&wakeupgen>; [all …]
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H A D | omap2430.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4-wkup", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/firmware/ |
H A D | arm,scmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Sudeep Holla <sudeep.holla@arm.com> 26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml 34 - description: SCMI compliant firmware with mailbox transport 36 - const: arm,scmi 37 - description: SCMI compliant firmware with ARM SMC/HVC transport 39 - const: arm,scmi-smc 40 - description: SCMI compliant firmware with ARM SMC/HVC transport [all …]
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/freebsd/sys/contrib/device-tree/Bindings/dsp/ |
H A D | fsl,dsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 15 advanced pre- and post- audio processing. 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/keystone/ |
H A D | ti,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI-SCI controller 10 - Nishanth Menon <nm@ti.com> 23 See https://software-dl.ti.com/tisci/esd/latest/index.html for protocol definition. 25 The TI-SCI node describes the Texas Instrument's System Controller entity node. 29 relationship between the TI-SCI parent node to the child node. 33 pattern: "^system-controller@[0-9a-f]+$" 37 - description: System controller on TI 66AK2G SoC and other K3 SoCs [all …]
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/freebsd/sys/contrib/device-tree/Bindings/serial/ |
H A D | nvidia,tegra194-tcu.txt | 4 systems within the Tegra SoC. It is implemented through a mailbox- 10 - name : Should be tcu 11 - compatible 14 - "nvidia,tegra194-tcu" 15 - mbox-names: 16 "rx" - Mailbox for receiving data from hardware UART 17 "tx" - Mailbox for transmitting data to hardware UART 18 - mboxes: Mailboxes corresponding to the mbox-names. 24 - .../mailbox/mailbox.txt 25 - .../mailbox/nvidia,tegra186-hsp.txt [all …]
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