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/linux/drivers/mailbox/
H A Dmailbox-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 #define MBOX_BASE(mdev, inst) ((mdev)->base + ((inst) * 4))
39 * struct sti_mbox_device - STi Mailbox device data
42 * @mbox: Representation of a communication channel controller
44 * @name: Name of the mailbox
55 struct mbox_controller *mbox; member
57 const char *name; member
63 * struct sti_mbox_pdata - STi Mailbox platform specific configuration
74 * struct sti_channel - STi Mailbox allocated channel information
88 struct sti_channel *chan_info = chan->con_priv; in sti_mbox_channel_is_enabled()
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H A Domap-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
6 * Copyright (C) 2013-2021 Texas Instruments Incorporated - https://www.ti.com
9 * Suman Anna <s-anna@ti.com>
84 const char *name; member
97 return __raw_readl(mdev->mbox_base + ofs); in mbox_read_reg()
103 __raw_writel(val, mdev->mbox_base + ofs); in mbox_write_reg()
107 static u32 mbox_fifo_read(struct omap_mbox *mbox) in mbox_fifo_read() argument
109 struct omap_mbox_fifo *fifo = &mbox->rx_fifo; in mbox_fifo_read()
111 return mbox_read_reg(mbox->parent, fifo->msg); in mbox_fifo_read()
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H A Dbcm74110-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/io-64-nonatomic-hi-lo.h>
94 struct bcm74110_mbox *mbox; member
114 #define BCM74110_OFFSET_IO_WRITEL_MACRO(name, offset_base) \ argument
115 static void bcm74110_##name##_writel(struct bcm74110_mbox *mbox,\
118 writel_relaxed(val, mbox->base + offset_base + off); \
120 BCM74110_OFFSET_IO_WRITEL_MACRO(tx, BCM_MBOX_BASE(mbox->tx_chan));
121 BCM74110_OFFSET_IO_WRITEL_MACRO(irq, BCM_MBOX_IRQ_BASE(mbox->rx_chan));
123 #define BCM74110_OFFSET_IO_READL_MACRO(name, offset_base) \ argument
124 static u32 bcm74110_##name##_readl(struct bcm74110_mbox *mbox, \
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H A Dqcom-ipcc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
32 * struct qcom_ipcc_chan_info - Per-mailbox-channel info
33 * @client_id: The client-id to which the interrupt has to be triggered
34 * @signal_id: The signal-id to which the interrupt has to be triggered
42 * struct qcom_ipcc - Holder for the mailbox driver
47 * @mchan: The per-mailbox channel info array
48 * @mbox: The mailbox controller
58 struct mbox_controller mbox; member
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H A Dti-msgmgr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/soc/ti/ti-msgmgr.h>
41 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
53 * struct ti_msgmgr_desc - Description of message manager integration
64 * @data_region_name: Name of the proxy data region
65 * @status_region_name: Name of the proxy status region
66 * @ctrl_region_name: Name of the proxy control region
92 * struct ti_queue_inst - Description of a queue instance
93 * @name: Queue Name
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H A Darmada-37xx-rwtm-mailbox.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <linux/armada-37xx-rwtm-mailbox.h>
18 #define DRIVER_NAME "armada-37xx-rwtm-mailbox"
45 struct a37xx_mbox *mbox = chan->con_priv; in a37xx_mbox_receive() local
49 rx_msg.retval = readl(mbox->base + RWTM_MBOX_RETURN_STATUS); in a37xx_mbox_receive()
51 rx_msg.status[i] = readl(mbox->base + RWTM_MBOX_STATUS(i)); in a37xx_mbox_receive()
59 struct a37xx_mbox *mbox = chan->con_priv; in a37xx_mbox_irq_handler() local
62 reg = readl(mbox->base + RWTM_HOST_INT_RESET); in a37xx_mbox_irq_handler()
68 dev_err(mbox->dev, "Secure processor command queue full\n"); in a37xx_mbox_irq_handler()
70 writel(reg, mbox->base + RWTM_HOST_INT_RESET); in a37xx_mbox_irq_handler()
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H A Dbcm2835-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2013-2014 Lubomir Rintel
8 * - arch/arm/mach-bcm2708/vcio.c file written by Gray Girling that was
9 * obtained from branch "rpi-3.6.y" of git://github.com/raspberrypi/
11 * - drivers/mailbox/bcm2835-ipc.c by Lubomir Rintel at
12 * https://github.com/hackerspace/rpi-linux/blob/lr-raspberry-pi/drivers/
13 * mailbox/bcm2835-ipc.c
14 * - documentation available on the following web site:
15 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
19 #include <linux/dma-mapping.h>
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H A Dmtk-adsp-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
19 struct mbox_controller mbox; member
31 static inline struct mtk_adsp_mbox_priv *get_mtk_adsp_mbox_priv(struct mbox_controller *mbox) in get_mtk_adsp_mbox_priv() argument
33 return container_of(mbox, struct mtk_adsp_mbox_priv, mbox); in get_mtk_adsp_mbox_priv()
39 struct mtk_adsp_mbox_priv *priv = get_mtk_adsp_mbox_priv(chan->mbox); in mtk_adsp_mbox_irq()
40 u32 op = readl(priv->va_mboxreg + priv->cfg->set_out); in mtk_adsp_mbox_irq()
42 writel(op, priv->va_mboxreg + priv->cfg->clr_out); in mtk_adsp_mbox_irq()
56 static struct mbox_chan *mtk_adsp_mbox_xlate(struct mbox_controller *mbox, in mtk_adsp_mbox_xlate() argument
59 return mbox->chans; in mtk_adsp_mbox_xlate()
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H A Dmailbox-altera.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright Altera Corporation (C) 2013-2014. All rights reserved
15 #define DRIVER_NAME "altera-mailbox"
40 bool is_sender; /* 1-sender, 0-receiver */
54 if (!chan || !chan->con_priv) in mbox_chan_to_altera_mbox()
57 return (struct altera_mbox *)chan->con_priv; in mbox_chan_to_altera_mbox()
60 static inline int altera_mbox_full(struct altera_mbox *mbox) in altera_mbox_full() argument
64 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG); in altera_mbox_full()
68 static inline int altera_mbox_pending(struct altera_mbox *mbox) in altera_mbox_pending() argument
72 status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG); in altera_mbox_pending()
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H A Dqcom-cpucp-mbox.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * struct qcom_cpucp_mbox - Holder for the mailbox driver
32 * @mbox: The mailbox controller
38 struct mbox_controller mbox; member
45 return chan - chan->mbox->chans; in channel_number()
54 status = readq(cpucp->rx_base + APSS_CPUCP_RX_MBOX_STAT); in qcom_cpucp_mbox_irq_fn()
57 u32 val = readl(cpucp->rx_base + APSS_CPUCP_RX_MBOX_CMD(i) + APSS_CPUCP_MBOX_CMD_OFF); in qcom_cpucp_mbox_irq_fn()
58 struct mbox_chan *chan = &cpucp->chans[i]; in qcom_cpucp_mbox_irq_fn()
61 /* Provide mutual exclusion with changes to chan->cl */ in qcom_cpucp_mbox_irq_fn()
62 spin_lock_irqsave(&chan->lock, flags); in qcom_cpucp_mbox_irq_fn()
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H A Dhi3660-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018 HiSilicon Limited.
3 // Copyright (c) 2017-2018 Linaro Limited.
25 #define MBOX_BASE(mbox, ch) ((mbox)->base + ((ch) * 0x40)) argument
48 * struct hi3660_chan_info - Hi3660 mailbox channel information
62 * struct hi3660_mbox - Hi3660 mailbox controller data
80 static struct hi3660_mbox *to_hi3660_mbox(struct mbox_controller *mbox) in to_hi3660_mbox() argument
82 return container_of(mbox, struct hi3660_mbox, controller); in to_hi3660_mbox()
87 unsigned long ch = (unsigned long)chan->con_priv; in hi3660_mbox_check_state()
88 struct hi3660_mbox *mbox = to_hi3660_mbox(chan->mbox); in hi3660_mbox_check_state() local
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H A Dsun6i-msgbox.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2017-2019 Samuel Holland <samuel@sholland.org>
44 #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__) argument
58 return chan - chan->mbox->chans; in channel_number()
63 return chan->con_priv; in to_sun6i_msgbox()
68 struct sun6i_msgbox *mbox = dev_id; in sun6i_msgbox_irq() local
73 status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & in sun6i_msgbox_irq()
74 readl(mbox->regs + LOCAL_IRQ_STAT_REG); in sun6i_msgbox_irq()
80 struct mbox_chan *chan = &mbox->controller.chans[n]; in sun6i_msgbox_irq()
86 uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); in sun6i_msgbox_irq()
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H A Dhi6220-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
57 * - direction: tx or rx
58 * - dst irq: peer core's irq number
59 * - ack irq: local irq number
60 * - slot number
90 static void mbox_set_state(struct hi6220_mbox *mbox, in mbox_set_state() argument
95 status = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
97 writel(status, mbox->base + MBOX_MODE_REG(slot)); in mbox_set_state()
100 static void mbox_set_mode(struct hi6220_mbox *mbox, in mbox_set_mode() argument
105 mode = readl(mbox->base + MBOX_MODE_REG(slot)); in mbox_set_mode()
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H A Dast2700-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
30 struct mbox_controller mbox; member
39 return chan - chan->mbox->chans; in ch_num()
44 return !(readl(mb->tx_regs + IPCR_STATUS) & BIT(idx)); in ast2700_mbox_tx_done()
51 int num_words = mb->msg_size / sizeof(u32); in ast2700_mbox_irq()
57 status = readl(mb->rx_regs + IPCR_ENABLE) & in ast2700_mbox_irq()
58 readl(mb->rx_regs + IPCR_STATUS); in ast2700_mbox_irq()
63 for (n = 0; n < mb->mbox.num_chans; ++n) { in ast2700_mbox_irq()
64 struct mbox_chan *chan = &mb->mbox.chans[n]; in ast2700_mbox_irq()
69 data_reg = mb->rx_regs + IPCR_DATA + mb->msg_size * n; in ast2700_mbox_irq()
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H A Drockchip-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
42 struct mbox_controller mbox; member
54 struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev); in rockchip_mbox_send_data()
56 struct rockchip_mbox_chan *chans = mb->chans; in rockchip_mbox_send_data()
59 return -EINVAL; in rockchip_mbox_send_data()
61 if (msg->rx_size > mb->buf_size) { in rockchip_mbox_send_data()
62 dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n", in rockchip_mbox_send_data()
63 mb->buf_size); in rockchip_mbox_send_data()
64 return -EINVAL; in rockchip_mbox_send_data()
67 dev_dbg(mb->mbox.dev, "Chan[%d]: A2B message, cmd 0x%08x\n", in rockchip_mbox_send_data()
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/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_vf.c1 // SPDX-License-Identifier: GPL-2.0
42 if (msg->id >= MBOX_MSG_MAX) { in otx2vf_process_vfaf_mbox_msg()
43 dev_err(vf->dev, in otx2vf_process_vfaf_mbox_msg()
44 "Mbox msg with unknown ID %d\n", msg->id); in otx2vf_process_vfaf_mbox_msg()
48 if (msg->sig != OTX2_MBOX_RSP_SIG) { in otx2vf_process_vfaf_mbox_msg()
49 dev_err(vf->dev, in otx2vf_process_vfaf_mbox_msg()
50 "Mbox msg with wrong signature %x, ID %d\n", in otx2vf_process_vfaf_mbox_msg()
51 msg->sig, msg->id); in otx2vf_process_vfaf_mbox_msg()
55 if (msg->rc == MBOX_MSG_INVALID) { in otx2vf_process_vfaf_mbox_msg()
56 dev_err(vf->dev, in otx2vf_process_vfaf_mbox_msg()
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H A Dotx2_ptp.c1 // SPDX-License-Identifier: GPL-2.0
19 if (!ptp->nic) in is_tstmp_atomic_update_supported()
22 mutex_lock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
23 req = otx2_mbox_alloc_msg_ptp_get_cap(&ptp->nic->mbox); in is_tstmp_atomic_update_supported()
25 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
29 err = otx2_sync_mbox_msg(&ptp->nic->mbox); in is_tstmp_atomic_update_supported()
31 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
34 rsp = (struct ptp_get_cap_rsp *)otx2_mbox_get_rsp(&ptp->nic->mbox.mbox, 0, in is_tstmp_atomic_update_supported()
35 &req->hdr); in is_tstmp_atomic_update_supported()
36 mutex_unlock(&ptp->nic->mbox.lock); in is_tstmp_atomic_update_supported()
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
59 phandle to the intended sub-mailbox child node to be used for communication.
60 The equivalent "mbox-names" property value can be used to give a name to the
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H A Dhisilicon,hi6220-mailbox.txt13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
22 phandle: Label name of mailbox controller
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
40 --------
43 compatible = "hisilicon,hi6220-mbox";
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H A Dst,sti-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/st,sti-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Patrice Chotard <patrice.chotard@foss.st.com>
19 const: st,stih407-mailbox
24 mbox-name:
26 description: name of the mailbox IP
32 "#mbox-cells":
36 - compatible
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H A Dhisilicon,hi3660-mailbox.txt9 ----------
12 - compatible: : Shall be "hisilicon,hi3660-mbox"
13 - reg: : Offset and length of the device's register set
14 - #mbox-cells: : Must be 3
16 phandle : Label name of controller
21 - interrupts: : Contains the two IRQ lines for mailbox.
26 compatible = "hisilicon,hi3660-mbox";
30 #mbox-cells = <3>;
34 ------
37 - compatible : See the client docs
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H A Daltera-mailbox.txt5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
12 - interrupts : interrupt number. The interrupt specifier format
17 compatible = "altr,mailbox-1.0";
19 interrupt-parent = < &gic_0 >;
21 #mbox-cells = <1>;
25 compatible = "altr,mailbox-1.0";
27 interrupt-parent = < &gic_0 >;
29 #mbox-cells = <1>;
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/linux/drivers/soc/apple/
H A Dmailbox.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
35 void (*rx)(struct apple_mbox *mbox, struct apple_mbox_msg msg, void *cookie);
40 struct apple_mbox *apple_mbox_get_byname(struct device *dev, const char *name);
42 int apple_mbox_start(struct apple_mbox *mbox);
43 void apple_mbox_stop(struct apple_mbox *mbox);
44 int apple_mbox_poll(struct apple_mbox *mbox);
45 int apple_mbox_send(struct apple_mbox *mbox, struct apple_mbox_msg msg,
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dpci.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
27 iowrite32be(val, (mlxsw_pci)->hw_addr + (MLXSW_PCI_ ## reg))
29 ioread32be((mlxsw_pci)->hw_addr + (MLXSW_PCI_ ## reg))
146 mlxsw_pci->napi_dev_tx = alloc_netdev_dummy(0); in mlxsw_pci_napi_devs_init()
147 if (!mlxsw_pci->napi_dev_tx) in mlxsw_pci_napi_devs_init()
148 return -ENOMEM; in mlxsw_pci_napi_devs_init()
149 strscpy(mlxsw_pci->napi_dev_tx->name, "mlxsw_tx", in mlxsw_pci_napi_devs_init()
150 sizeof(mlxsw_pci->napi_dev_tx->name)); in mlxsw_pci_napi_devs_init()
152 mlxsw_pci->napi_dev_rx = alloc_netdev_dummy(0); in mlxsw_pci_napi_devs_init()
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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