Lines Matching +full:mbox +full:- +full:name
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 bootph-all;
23 reserved_memory: reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
35 compatible = "shared-dma-pool";
37 no-map;
40 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
41 compatible = "shared-dma-pool";
43 no-map;
46 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
47 compatible = "shared-dma-pool";
49 no-map;
52 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
53 compatible = "shared-dma-pool";
55 no-map;
58 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
59 compatible = "shared-dma-pool";
61 no-map;
64 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
65 compatible = "shared-dma-pool";
67 no-map;
70 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
71 compatible = "shared-dma-pool";
73 no-map;
76 main_r5fss0_core1_memory_region: r5f-memory@a3100000 {
77 compatible = "shared-dma-pool";
79 no-map;
82 main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a4000000 {
83 compatible = "shared-dma-pool";
85 no-map;
88 main_r5fss1_core0_memory_region: r5f-memory@a4100000 {
89 compatible = "shared-dma-pool";
91 no-map;
94 main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a5000000 {
95 compatible = "shared-dma-pool";
97 no-map;
100 main_r5fss1_core1_memory_region: r5f-memory@a5100000 {
101 compatible = "shared-dma-pool";
103 no-map;
106 c71_0_dma_memory_region: c71-dma-memory@a6000000 {
107 compatible = "shared-dma-pool";
109 no-map;
112 c71_0_memory_region: c71-memory@a6100000 {
113 compatible = "shared-dma-pool";
115 no-map;
118 c71_1_dma_memory_region: c71-dma-memory@a7000000 {
119 compatible = "shared-dma-pool";
121 no-map;
124 c71_1_memory_region: c71-memory@a7100000 {
125 compatible = "shared-dma-pool";
127 no-map;
130 rtos_ipc_memory_region: ipc-memories@a8000000 {
133 no-map;
137 mux0: mux-controller-0 {
138 compatible = "gpio-mux";
139 #mux-state-cells = <1>;
140 mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>;
143 mux1: mux-controller-1 {
144 compatible = "gpio-mux";
145 #mux-state-cells = <1>;
146 mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
149 transceiver0: can-phy0 {
152 #phy-cells = <0>;
153 max-bitrate = <5000000>;
158 mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins {
159 pinctrl-single,pins = <
173 bootph-all;
178 pmic_irq_pins_default: pmic-irq-default-pins {
179 pinctrl-single,pins = <
187 wkup_i2c0_pins_default: wkup-i2c0-default-pins {
188 pinctrl-single,pins = <
192 bootph-pre-ram;
197 main_i2c0_pins_default: main-i2c0-default-pins {
198 pinctrl-single,pins = <
204 main_mcan16_pins_default: main-mcan16-default-pins {
205 pinctrl-single,pins = <
214 pinctrl-names = "default";
215 pinctrl-0 = <&wkup_i2c0_pins_default>;
216 clock-frequency = <400000>;
219 /* CAV24C256WE-GT3 */
225 compatible = "ti,tps6594-q1";
227 system-power-controller;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pmic_irq_pins_default>;
230 interrupt-parent = <&wkup_gpio0>;
232 gpio-controller;
233 #gpio-cells = <2>;
234 ti,primary-pmic;
235 buck1234-supply = <&vsys_3v3>;
236 buck5-supply = <&vsys_3v3>;
237 ldo1-supply = <&vsys_3v3>;
238 ldo2-supply = <&vsys_3v3>;
239 ldo3-supply = <&vsys_3v3>;
240 ldo4-supply = <&vsys_3v3>;
244 regulator-name = "vdd_cpu_avs";
245 regulator-min-microvolt = <600000>;
246 regulator-max-microvolt = <900000>;
247 regulator-boot-on;
248 regulator-always-on;
249 bootph-pre-ram;
253 regulator-name = "vdd_mcu_0v85";
254 regulator-min-microvolt = <850000>;
255 regulator-max-microvolt = <850000>;
256 regulator-boot-on;
257 regulator-always-on;
261 regulator-name = "vdd_mcuwk_0v8";
262 regulator-min-microvolt = <800000>;
263 regulator-max-microvolt = <800000>;
264 regulator-boot-on;
265 regulator-always-on;
269 regulator-name = "vdd_mcu_gpioret_3v3";
270 regulator-min-microvolt = <3300000>;
271 regulator-max-microvolt = <3300000>;
272 regulator-boot-on;
273 regulator-always-on;
277 regulator-name = "vdd_mcuio_1v8";
278 regulator-min-microvolt = <1800000>;
279 regulator-max-microvolt = <1800000>;
280 regulator-boot-on;
281 regulator-always-on;
285 regulator-name = "vda_mcu_1v8";
286 regulator-min-microvolt = <1800000>;
287 regulator-max-microvolt = <1800000>;
288 regulator-boot-on;
289 regulator-always-on;
295 compatible = "ti,tps6594-q1";
297 system-power-controller;
298 interrupt-parent = <&wkup_gpio0>;
300 gpio-controller;
301 #gpio-cells = <2>;
302 buck1-supply = <&vsys_3v3>;
303 buck2-supply = <&vsys_3v3>;
304 buck3-supply = <&vsys_3v3>;
305 buck4-supply = <&vsys_3v3>;
306 buck5-supply = <&vsys_3v3>;
307 ldo1-supply = <&vsys_3v3>;
308 ldo2-supply = <&vsys_3v3>;
309 ldo3-supply = <&vsys_3v3>;
310 ldo4-supply = <&vsys_3v3>;
314 regulator-name = "vdd_io_1v8_reg";
315 regulator-min-microvolt = <1800000>;
316 regulator-max-microvolt = <1800000>;
317 regulator-always-on;
318 regulator-boot-on;
322 regulator-name = "vdd_fpd_1v1";
323 regulator-min-microvolt = <1100000>;
324 regulator-max-microvolt = <1100000>;
325 regulator-boot-on;
326 regulator-always-on;
330 regulator-name = "vdd_phy_1v8";
331 regulator-min-microvolt = <1800000>;
332 regulator-max-microvolt = <1800000>;
333 regulator-boot-on;
334 regulator-always-on;
338 regulator-name = "vdd_ddr_1v1";
339 regulator-min-microvolt = <1100000>;
340 regulator-max-microvolt = <1100000>;
341 regulator-boot-on;
342 regulator-always-on;
346 regulator-name = "vdd_ram_0v85";
347 regulator-min-microvolt = <850000>;
348 regulator-max-microvolt = <850000>;
349 regulator-boot-on;
350 regulator-always-on;
354 regulator-name = "vdd_wk_0v8";
355 regulator-min-microvolt = <800000>;
356 regulator-max-microvolt = <800000>;
357 regulator-boot-on;
358 regulator-always-on;
362 regulator-name = "vdd_gpioret_3v3";
363 regulator-min-microvolt = <3300000>;
364 regulator-max-microvolt = <3300000>;
365 regulator-boot-on;
366 regulator-always-on;
370 regulator-name = "vda_dll_0v8";
371 regulator-min-microvolt = <800000>;
372 regulator-max-microvolt = <800000>;
373 regulator-boot-on;
374 regulator-always-on;
378 regulator-name = "vda_pll_1v8";
379 regulator-min-microvolt = <1800000>;
380 regulator-max-microvolt = <1800000>;
381 regulator-boot-on;
382 regulator-always-on;
388 compatible = "ti,lp8764-q1";
390 system-power-controller;
391 interrupt-parent = <&wkup_gpio0>;
393 gpio-controller;
394 #gpio-cells = <2>;
395 buck1234-supply = <&vsys_3v3>;
399 regulator-name = "vdd_core_0v8";
400 regulator-min-microvolt = <800000>;
401 regulator-max-microvolt = <800000>;
402 regulator-boot-on;
403 regulator-always-on;
411 pinctrl-names = "default";
412 pinctrl-0 = <&main_i2c0_pins_default>;
413 clock-frequency = <400000>;
418 gpio-controller;
419 #gpio-cells = <2>;
420 gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
429 pinctrl-0 = <&main_mcan16_pins_default>;
430 pinctrl-names = "default";
436 pinctrl-names = "default";
437 pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
440 compatible = "jedec,spi-nor";
442 spi-tx-bus-width = <8>;
443 spi-rx-bus-width = <8>;
444 spi-max-frequency = <25000000>;
445 bootph-all;
446 cdns,tshsl-ns = <60>;
447 cdns,tsd2d-ns = <60>;
448 cdns,tchsh-ns = <60>;
449 cdns,tslch-ns = <60>;
450 cdns,read-delay = <4>;
457 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
458 ti,mbox-rx = <0 0 0>;
459 ti,mbox-tx = <1 0 0>;
462 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
463 ti,mbox-rx = <2 0 0>;
464 ti,mbox-tx = <3 0 0>;
471 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
472 ti,mbox-rx = <0 0 0>;
473 ti,mbox-tx = <1 0 0>;
476 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
477 ti,mbox-rx = <2 0 0>;
478 ti,mbox-tx = <3 0 0>;
485 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
486 ti,mbox-rx = <0 0 0>;
487 ti,mbox-tx = <1 0 0>;
490 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
491 ti,mbox-rx = <2 0 0>;
492 ti,mbox-tx = <3 0 0>;
499 mbox_c71_0: mbox-c71-0 {
500 ti,mbox-rx = <0 0 0>;
501 ti,mbox-tx = <1 0 0>;
504 mbox_c71_1: mbox-c71-1 {
505 ti,mbox-rx = <2 0 0>;
506 ti,mbox-tx = <3 0 0>;
512 memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
518 memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
523 ti,cluster-mode = <0>;
527 ti,cluster-mode = <0>;
557 memory-region = <&main_r5fss0_core0_dma_memory_region>,
563 memory-region = <&main_r5fss0_core1_dma_memory_region>,
569 memory-region = <&main_r5fss1_core0_dma_memory_region>,
575 memory-region = <&main_r5fss1_core1_dma_memory_region>,
582 memory-region = <&c71_0_dma_memory_region>,
589 memory-region = <&c71_1_dma_memory_region>,