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/linux/Documentation/devicetree/bindings/pci/
H A Drockchip,rk3399-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: /schemas/pci/pci-ep.yaml#
14 - $ref: rockchip,rk3399-pcie-common.yaml#
18 const: rockchip,rk3399-pcie-ep
22 reg-names:
24 - const: apb-base
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H A Dcdns-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: cdns-pcie.yaml#
14 - $ref: pci-ep.yaml#
17 cdns,max-outbound-regions:
18 description: maximum number of outbound regions
H A Dcdns,cdns-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: cdns-pcie-ep.yaml#
17 const: cdns,cdns-pcie-ep
22 reg-names:
24 - const: reg
25 - const: mem
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H A Dbaikal,bt1-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 PCIe Root Port Controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 Embedded into Baikal-T1 SoC Root Complex controller with a single port
14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured
18 performed by software. There four in- and four outbound iATU regions
22 - $ref: /schemas/pci/snps,dw-pcie.yaml#
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/linux/drivers/scsi/pm8001/
H A Dpm8001_defs.h2 * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
18 * 3. Neither the names of the above-listed copyright holders nor the names
68 DATA_DIR_OUT = 0x02, /* OUTBOUND */
77 /* driver compile-time configuration */
78 #define PM8001_MAX_CCB 1024 /* max ccbs supported */
84 /* Inbound/Outbound queue size */
89 #define PM8001_MAX_PHYS 16 /* max. possible phys */
90 #define PM8001_MAX_PORTS 16 /* max. possible ports */
91 #define PM8001_MAX_DEVICES 2048 /* max supported device */
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/linux/drivers/rapidio/devices/
H A Dtsi721.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RapidIO mport driver for Tsi721 PCIExpress-to-SRIO bridge
19 #include <linux/dma-mapping.h>
32 static int pcie_mrrs = -1;
47 * tsi721_lcread - read from local SREP config space
56 * Returns: %0 on success or %-EINVAL on failure.
61 struct tsi721_device *priv = mport->priv; in tsi721_lcread()
64 return -EINVAL; /* only 32-bit access is supported */ in tsi721_lcread()
66 *data = ioread32(priv->regs + offset); in tsi721_lcread()
72 * tsi721_lcwrite - write into local SREP config space
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/linux/include/linux/
H A Drio.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 #define RIO_NO_HOPCOUNT -1
56 * 0 RapidIO outbound doorbells
57 * 1-15 RapidIO memory regions
63 * 2 RapidIO outbound mailboxes
89 * struct rio_switch - RIO switch info
92 * @port_ok: Status of each port (one bit per port) - OK=1 or UNINIT=0
93 * @ops: pointer to switch-specific operations
95 * @nextdev: Array of per-port pointers to the next attached device
107 * struct rio_switch_ops - Per-switch operations
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/linux/drivers/pci/controller/
H A Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
9 #include <linux/pci-ecam.h>
17 #include <linux/irqchip/arm-gic-v3.h>
24 #include "pcie-iproc.h"
62 /* derive the enum index of the outbound/inbound mapping registers */
66 * Maximum number of outbound mapping window sizes that can be supported by any
91 * struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
93 * @window_sizes: list of supported outbound mapping window sizes in MB
94 * @nr_sizes: number of supported outbound mapping window sizes
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/linux/drivers/scsi/esas2r/
H A Desas2r_init.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
50 mem_desc->esas2r_param = mem_desc->size + align; in esas2r_initmem_alloc()
51 mem_desc->virt_addr = NULL; in esas2r_initmem_alloc()
52 mem_desc->phys_addr = 0; in esas2r_initmem_alloc()
53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, in esas2r_initmem_alloc()
54 (size_t)mem_desc-> in esas2r_initmem_alloc()
56 (dma_addr_t *)&mem_desc-> in esas2r_initmem_alloc()
60 if (mem_desc->esas2r_data == NULL) { in esas2r_initmem_alloc()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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/linux/Documentation/
H A Dmemory-barriers.txt19 documentation at tools/memory-model/. Nevertheless, even this memory
37 Note also that it is possible that a barrier may be a no-op for an
48 - Device operations.
49 - Guarantees.
53 - Varieties of memory barrier.
54 - What may not be assumed about memory barriers?
55 - Address-dependency barriers (historical).
56 - Control dependencies.
57 - SMP barrier pairing.
58 - Examples of memory barrier sequences.
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/linux/drivers/accel/habanalabs/common/
H A Dhabanalabs.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2023 HabanaLabs, Ltd.
19 #include <linux/dma-direction.h>
28 #include <linux/io-64-nonatomic-lo-hi.h>
30 #include <linux/dma-buf.h>
45 * bits[63:59] - Encode mmap type
46 * bits[45:0] - mmap offset value
51 #define HL_MMAP_TYPE_SHIFT (59 - PAGE_SHIFT)
110 * enum hl_mmu_page_table_location - mmu page table location
111 * @MMU_DR_PGT: page-table is located on device DRAM.
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/linux/drivers/message/fusion/
H A Dmptbase.c8 * Copyright (c) 1999-2008 LSI Corporation
9 * (mailto:DL-MPTFusionLinux@lsi.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
61 #include <linux/dma-mapping.h>
68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
106 " debug level - refer to mptdebug.h - (default=0)");
112 "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
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/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2020-2022 HabanaLabs, Ltd.
45 * since the code already has built-in support for binning of up to MAX_FAULTY_TPCS TPCs
47 * for MAX faulty TPCs which reflects the cluster binning requirements
126 #define GAUDI2_PMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 2, 0)
127 #define GAUDI2_HMMU_SPI_SEI_ENABLE_MASK GENMASK(GAUDI2_NUM_OF_MMU_SPI_SEI_CAUSE - 1, 0)
131 #define GAUDI2_VDEC_MSIX_ENTRIES (GAUDI2_IRQ_NUM_SHARED_DEC1_ABNRM - \
134 #define ENGINE_ID_DCORE_OFFSET (GAUDI2_DCORE1_ENGINE_ID_EDMA_0 - GAUDI2_DCORE0_ENGINE_ID_EDMA_0)
164 /* HW scrambles only bits 0-25 */
796 "FENCE 0 inc over max value and clipped",
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/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2022 HabanaLabs, Ltd.
23 * - Range registers (When MMU is enabled, DMA RR does NOT protect host)
24 * - MMU
27 * - Range registers (protect the first 512MB)
28 * - MMU (isolation between users)
31 * - Range registers
32 * - Protection bits
44 * - checks DMA pointer
45 * - WREG, MSG_PROT are not allowed.
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/linux/Documentation/virt/kvm/
H A Dapi.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
24 - System ioctls: These query and set global attributes which affect the
28 - VM ioctls: These query and set attributes that affect an entire virtual
35 - vcpu ioctls: These query and set attributes that control the operation
43 - device ioctls: These query and set attributes that control the operation
92 facility that allows backward-compatible extensions to the API to be
133 -----------------------
150 -----------------
189 address used by the VM. The IPA_Bits is encoded in bits[7-0] of the
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