/linux/Documentation/devicetree/bindings/gpu/ |
H A D | arm,mali-utgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Mali Utgard GPU 10 - Rob Herring <robh@kernel.org> 11 - Maxime Ripard <mripard@kernel.org> 12 - Heiko Stuebner <heiko@sntech.de> 16 pattern: '^gpu@[a-f0-9]+$' 19 - items: [all …]
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/linux/drivers/gpu/drm/lima/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 OR MIT 2 # Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> 5 tristate "LIMA (DRM support for ARM Mali 400/450 GPU)" 16 DRM driver for ARM Mali 400/450 GPUs.
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H A D | lima_drv.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */ 42 if (args->pad) in lima_ioctl_get_param() 43 return -EINVAL; in lima_ioctl_get_param() 45 switch (args->param) { in lima_ioctl_get_param() 47 switch (ldev->id) { in lima_ioctl_get_param() 49 args->value = DRM_LIMA_PARAM_GPU_ID_MALI400; in lima_ioctl_get_param() 52 args->value = DRM_LIMA_PARAM_GPU_ID_MALI450; in lima_ioctl_get_param() 55 args->value = DRM_LIMA_PARAM_GPU_ID_UNKNOWN; in lima_ioctl_get_param() 61 args->value = ldev->pipe[lima_pipe_pp].num_processor; in lima_ioctl_get_param() [all …]
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/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun8i-h3.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include "sunxi-h3-h5.dtsi" 44 #include <dt-bindings/thermal/thermal.h> 47 cpu0_opp_table: opp-table-cpu { 48 compatible = "operating-points-v2"; 49 opp-shared; 51 opp-648000000 { 52 opp-hz = /bits/ 64 <648000000>; 53 opp-microvolt = <1040000 1040000 1300000>; 54 clock-latency-ns = <244144>; /* 8 32k periods */ [all …]
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H A D | sun8i-a23-a33.dtsi | 2 * Copyright 2014 Chen-Yu Tsai 4 * Chen-Yu Tsai <wens@csie.org> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun6i-rtc.h> 48 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> 49 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> 52 interrupt-parent = <&gic>; 53 #address-cells = <1>; 54 #size-cells = <1>; [all …]
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H A D | sun5i.dtsi | 2 * Copyright 2012-2015 Maxime Ripard 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/clock/sun5i-ccu.h> 46 #include <dt-bindings/dma/sun4i-a10.h> 47 #include <dt-bindings/reset/sun5i-ccu.h> 50 interrupt-parent = <&intc>; 51 #address-cells = <1>; 52 #size-cells = <1>; 55 #address-cells = <1>; [all …]
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H A D | sun8i-r40.dtsi | 2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org> 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/interrupt-controller/arm-gic.h> 45 #include <dt-bindings/clock/sun6i-rtc.h> 46 #include <dt-bindings/clock/sun8i-de2.h> 47 #include <dt-bindings/clock/sun8i-r40-ccu.h> 48 #include <dt-bindings/clock/sun8i-tcon-top.h> 49 #include <dt-bindings/reset/sun8i-r40-ccu.h> 50 #include <dt-bindings/reset/sun8i-de2.h> 51 #include <dt-bindings/thermal/thermal.h> [all …]
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/linux/arch/arm/boot/dts/amlogic/ |
H A D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | ste-dbx5x0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/ste-db8500-clkout.h> 9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h> 10 #include <dt-bindings/mfd/dbx500-prcmu.h> 11 #include <dt-bindings/arm/ux500_pm_domains.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/thermal/thermal.h> 16 #address-cells = <1>; [all …]
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/linux/arch/arm64/boot/dts/exynos/ |
H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 30 arm-pmu { 31 compatible = "arm,cortex-a57-pmu"; 36 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, 42 compatible = "fixed-clock"; [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3036.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 8 #include <dt-bindings/soc/rockchip,boot-mode.h> 9 #include <dt-bindings/power/rk3036-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 22 #address-cells = <1>; 23 #size-cells = <0>; 24 enable-method = "rockchip,rk3066-smp"; 28 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 37 compatible = "fixed-clock"; 38 clock-frequency = <24000000>; 39 #clock-cells = <0>; [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3588-ok3588-c.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include "rk3588-fet3588-c.dtsi" 7 model = "Forlinx OK3588-C Board"; 8 compatible = "forlinx,ok3588-c", "forlinx,fet3588-c", "rockchip,rk3588"; 16 adc-keys-0 { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 0>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1800000>; [all …]
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H A D | rk3588-tiger.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 12 compatible = "tsd,rk3588-tiger", "rockchip,rk3588"; 19 emmc_pwrseq: emmc-pwrseq { 20 compatible = "mmc-pwrseq-emmc"; 21 pinctrl-0 = <&emmc_reset>; 22 pinctrl-names = "default"; 23 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; [all …]
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H A D | rk3588-coolpi-cm5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 15 compatible = "coolpi,pi-cm5", "rockchip,rk3588"; 24 analog-sound { 25 compatible = "audio-graph-card"; 27 label = "rk3588-es8316"; 36 stdout-path = "serial2:1500000n8"; [all …]
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H A D | rk3588-friendlyelec-cm3588.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/rockchip.h> 26 stdout-path = "serial2:1500000n8"; 30 compatible = "gpio-leds"; 32 led_sys: led-0 { 36 linux,default-trigger = "heartbeat"; 37 pinctrl-names = "default"; [all …]
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 #include <dt-bindings/interrupt-controller/irq.h> 19 #include <dt-bindings/power/xlnx-zynqmp-power.h> 20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 24 #address-cells = <2>; 25 #size-cells = <2>; [all …]
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/linux/arch/arm64/boot/dts/arm/ |
H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 frame-number = <1>; 31 #mbox-cells = <1>; 33 clock-names = "apb_pclk"; [all …]
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/linux/drivers/clk/spear/ |
H A D | spear1340_clock.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch/arm/mach-spear13xx/spear1340_clock.c 167 {.mode = 0, .m = 0x64, .n = 0x06, .p = 0x1}, /* vco 800, pll 400 MHz */ 175 /* vco-pll4 rate configuration table, in ascending order of rates */ 179 {.mode = 0, .m = 0xC8, .n = 0x06, .p = 0x2}, /* vco 1600, pll 400 MHz */ 190 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */ 202 * 250, 332, 400 or 500 MHz considering different possibilites of input 205 * -------------------------------------------------------------------- 207 * -------------------------------------------------------------------- 208 * 400 200 100 0x04000 [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; 47 clock-names = "bus"; [all …]
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H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 46 bus_dmc: bus-dmc { 47 compatible = "samsung,exynos-bus"; [all …]
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/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/hisi,hi6220-resets.h> 10 #include <dt-bindings/clock/hi6220-clock.h> 11 #include <dt-bindings/pinctrl/hisi.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 compatible = "arm,psci-0.2"; [all …]
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