1*7fee8888STianling Shen// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*7fee8888STianling Shen/* 3*7fee8888STianling Shen * Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd. 4*7fee8888STianling Shen * (http://www.friendlyelec.com) 5*7fee8888STianling Shen * 6*7fee8888STianling Shen * Copyright (c) 2025 Tianling Shen <cnsztl@gmail.com> 7*7fee8888STianling Shen */ 8*7fee8888STianling Shen 9*7fee8888STianling Shen/dts-v1/; 10*7fee8888STianling Shen#include <dt-bindings/gpio/gpio.h> 11*7fee8888STianling Shen#include <dt-bindings/input/input.h> 12*7fee8888STianling Shen#include <dt-bindings/leds/common.h> 13*7fee8888STianling Shen#include <dt-bindings/pinctrl/rockchip.h> 14*7fee8888STianling Shen#include <dt-bindings/soc/rockchip,vop2.h> 15*7fee8888STianling Shen 16*7fee8888STianling Shen#include "rk3576.dtsi" 17*7fee8888STianling Shen 18*7fee8888STianling Shen/ { 19*7fee8888STianling Shen model = "FriendlyElec NanoPi R76S"; 20*7fee8888STianling Shen compatible = "friendlyarm,nanopi-r76s", "rockchip,rk3576"; 21*7fee8888STianling Shen 22*7fee8888STianling Shen aliases { 23*7fee8888STianling Shen mmc0 = &sdhci; 24*7fee8888STianling Shen mmc1 = &sdmmc; 25*7fee8888STianling Shen mmc2 = &sdio; 26*7fee8888STianling Shen }; 27*7fee8888STianling Shen 28*7fee8888STianling Shen chosen { 29*7fee8888STianling Shen stdout-path = "serial0:1500000n8"; 30*7fee8888STianling Shen }; 31*7fee8888STianling Shen 32*7fee8888STianling Shen gpio-keys { 33*7fee8888STianling Shen compatible = "gpio-keys"; 34*7fee8888STianling Shen pinctrl-names = "default"; 35*7fee8888STianling Shen pinctrl-0 = <&user_but_pin>; 36*7fee8888STianling Shen 37*7fee8888STianling Shen button-reset { 38*7fee8888STianling Shen label = "reset"; 39*7fee8888STianling Shen gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; 40*7fee8888STianling Shen debounce-interval = <50>; 41*7fee8888STianling Shen linux,code = <KEY_RESTART>; 42*7fee8888STianling Shen wakeup-source; 43*7fee8888STianling Shen }; 44*7fee8888STianling Shen }; 45*7fee8888STianling Shen 46*7fee8888STianling Shen gpio-leds { 47*7fee8888STianling Shen compatible = "gpio-leds"; 48*7fee8888STianling Shen pinctrl-names = "default"; 49*7fee8888STianling Shen pinctrl-0 = <&led1_h>, <&led_sys_h>, <&led2_h>; 50*7fee8888STianling Shen 51*7fee8888STianling Shen led-0 { 52*7fee8888STianling Shen color = <LED_COLOR_ID_GREEN>; 53*7fee8888STianling Shen function = LED_FUNCTION_LAN; 54*7fee8888STianling Shen gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>; 55*7fee8888STianling Shen }; 56*7fee8888STianling Shen 57*7fee8888STianling Shen led-1 { 58*7fee8888STianling Shen color = <LED_COLOR_ID_RED>; 59*7fee8888STianling Shen function = LED_FUNCTION_POWER; 60*7fee8888STianling Shen gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; 61*7fee8888STianling Shen linux,default-trigger = "heartbeat"; 62*7fee8888STianling Shen }; 63*7fee8888STianling Shen 64*7fee8888STianling Shen led-2 { 65*7fee8888STianling Shen color = <LED_COLOR_ID_GREEN>; 66*7fee8888STianling Shen function = LED_FUNCTION_WAN; 67*7fee8888STianling Shen gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>; 68*7fee8888STianling Shen }; 69*7fee8888STianling Shen }; 70*7fee8888STianling Shen 71*7fee8888STianling Shen hdmi-con { 72*7fee8888STianling Shen compatible = "hdmi-connector"; 73*7fee8888STianling Shen hdmi-pwr-supply = <&vcc5v_hdmi_tx>; 74*7fee8888STianling Shen type = "a"; 75*7fee8888STianling Shen 76*7fee8888STianling Shen port { 77*7fee8888STianling Shen hdmi_con_in: endpoint { 78*7fee8888STianling Shen remote-endpoint = <&hdmi_out_con>; 79*7fee8888STianling Shen }; 80*7fee8888STianling Shen }; 81*7fee8888STianling Shen }; 82*7fee8888STianling Shen 83*7fee8888STianling Shen sdio_pwrseq: sdio-pwrseq { 84*7fee8888STianling Shen compatible = "mmc-pwrseq-simple"; 85*7fee8888STianling Shen clocks = <&hym8563>; 86*7fee8888STianling Shen clock-names = "ext_clock"; 87*7fee8888STianling Shen pinctrl-names = "default"; 88*7fee8888STianling Shen pinctrl-0 = <&wifi_reg_on_h>; 89*7fee8888STianling Shen post-power-on-delay-ms = <200>; 90*7fee8888STianling Shen reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 91*7fee8888STianling Shen }; 92*7fee8888STianling Shen 93*7fee8888STianling Shen vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 { 94*7fee8888STianling Shen compatible = "regulator-fixed"; 95*7fee8888STianling Shen regulator-always-on; 96*7fee8888STianling Shen regulator-boot-on; 97*7fee8888STianling Shen regulator-min-microvolt = <3300000>; 98*7fee8888STianling Shen regulator-max-microvolt = <3300000>; 99*7fee8888STianling Shen regulator-name = "vcc3v3_rtc_s5"; 100*7fee8888STianling Shen vin-supply = <&vcc5v0_sys_s5>; 101*7fee8888STianling Shen }; 102*7fee8888STianling Shen 103*7fee8888STianling Shen vcc5v_dcin: regulator-vcc5v-dcin { 104*7fee8888STianling Shen compatible = "regulator-fixed"; 105*7fee8888STianling Shen regulator-always-on; 106*7fee8888STianling Shen regulator-boot-on; 107*7fee8888STianling Shen regulator-min-microvolt = <5000000>; 108*7fee8888STianling Shen regulator-max-microvolt = <5000000>; 109*7fee8888STianling Shen regulator-name = "vcc5v_dcin"; 110*7fee8888STianling Shen }; 111*7fee8888STianling Shen 112*7fee8888STianling Shen vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx { 113*7fee8888STianling Shen compatible = "regulator-fixed"; 114*7fee8888STianling Shen enable-active-high; 115*7fee8888STianling Shen gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 116*7fee8888STianling Shen pinctrl-names = "default"; 117*7fee8888STianling Shen pinctrl-0 = <&hdmi_tx_on_h>; 118*7fee8888STianling Shen regulator-min-microvolt = <5000000>; 119*7fee8888STianling Shen regulator-max-microvolt = <5000000>; 120*7fee8888STianling Shen regulator-name = "vcc5v_hdmi_tx"; 121*7fee8888STianling Shen vin-supply = <&vcc5v0_sys_s5>; 122*7fee8888STianling Shen }; 123*7fee8888STianling Shen 124*7fee8888STianling Shen vcc5v0_device_s0: regulator-vcc5v0-device-s0 { 125*7fee8888STianling Shen compatible = "regulator-fixed"; 126*7fee8888STianling Shen regulator-always-on; 127*7fee8888STianling Shen regulator-boot-on; 128*7fee8888STianling Shen regulator-min-microvolt = <5000000>; 129*7fee8888STianling Shen regulator-max-microvolt = <5000000>; 130*7fee8888STianling Shen regulator-name = "vcc5v0_device_s0"; 131*7fee8888STianling Shen vin-supply = <&vcc5v_dcin>; 132*7fee8888STianling Shen }; 133*7fee8888STianling Shen 134*7fee8888STianling Shen vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 { 135*7fee8888STianling Shen compatible = "regulator-fixed"; 136*7fee8888STianling Shen regulator-always-on; 137*7fee8888STianling Shen regulator-boot-on; 138*7fee8888STianling Shen regulator-min-microvolt = <5000000>; 139*7fee8888STianling Shen regulator-max-microvolt = <5000000>; 140*7fee8888STianling Shen regulator-name = "vcc5v0_sys_s5"; 141*7fee8888STianling Shen vin-supply = <&vcc5v_dcin>; 142*7fee8888STianling Shen }; 143*7fee8888STianling Shen 144*7fee8888STianling Shen vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 { 145*7fee8888STianling Shen compatible = "regulator-fixed"; 146*7fee8888STianling Shen enable-active-high; 147*7fee8888STianling Shen gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; 148*7fee8888STianling Shen pinctrl-names = "default"; 149*7fee8888STianling Shen pinctrl-0 = <&usb_otg0_pwren_h>; 150*7fee8888STianling Shen regulator-min-microvolt = <5000000>; 151*7fee8888STianling Shen regulator-max-microvolt = <5000000>; 152*7fee8888STianling Shen regulator-name = "vcc5v0_usb_otg0"; 153*7fee8888STianling Shen vin-supply = <&vcc5v0_sys_s5>; 154*7fee8888STianling Shen }; 155*7fee8888STianling Shen 156*7fee8888STianling Shen vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 157*7fee8888STianling Shen compatible = "regulator-fixed"; 158*7fee8888STianling Shen regulator-always-on; 159*7fee8888STianling Shen regulator-boot-on; 160*7fee8888STianling Shen regulator-min-microvolt = <1100000>; 161*7fee8888STianling Shen regulator-max-microvolt = <1100000>; 162*7fee8888STianling Shen regulator-name = "vcc_1v1_nldo_s3"; 163*7fee8888STianling Shen vin-supply = <&vcc5v0_sys_s5>; 164*7fee8888STianling Shen }; 165*7fee8888STianling Shen 166*7fee8888STianling Shen vcc_1v8_s0: regulator-vcc-1v8-s0 { 167*7fee8888STianling Shen compatible = "regulator-fixed"; 168*7fee8888STianling Shen regulator-always-on; 169*7fee8888STianling Shen regulator-boot-on; 170*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 171*7fee8888STianling Shen regulator-max-microvolt = <1800000>; 172*7fee8888STianling Shen regulator-name = "vcc_1v8_s0"; 173*7fee8888STianling Shen vin-supply = <&vcc_1v8_s3>; 174*7fee8888STianling Shen }; 175*7fee8888STianling Shen 176*7fee8888STianling Shen vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { 177*7fee8888STianling Shen compatible = "regulator-fixed"; 178*7fee8888STianling Shen regulator-always-on; 179*7fee8888STianling Shen regulator-boot-on; 180*7fee8888STianling Shen regulator-min-microvolt = <2000000>; 181*7fee8888STianling Shen regulator-max-microvolt = <2000000>; 182*7fee8888STianling Shen regulator-name = "vcc_2v0_pldo_s3"; 183*7fee8888STianling Shen vin-supply = <&vcc5v0_sys_s5>; 184*7fee8888STianling Shen }; 185*7fee8888STianling Shen 186*7fee8888STianling Shen vcc_3v3_s0: regulator-vcc-3v3-s0 { 187*7fee8888STianling Shen compatible = "regulator-fixed"; 188*7fee8888STianling Shen regulator-always-on; 189*7fee8888STianling Shen regulator-boot-on; 190*7fee8888STianling Shen regulator-min-microvolt = <3300000>; 191*7fee8888STianling Shen regulator-max-microvolt = <3300000>; 192*7fee8888STianling Shen regulator-name = "vcc_3v3_s0"; 193*7fee8888STianling Shen vin-supply = <&vcc_3v3_s3>; 194*7fee8888STianling Shen }; 195*7fee8888STianling Shen}; 196*7fee8888STianling Shen 197*7fee8888STianling Shen&combphy0_ps { 198*7fee8888STianling Shen status = "okay"; 199*7fee8888STianling Shen}; 200*7fee8888STianling Shen 201*7fee8888STianling Shen&combphy1_psu { 202*7fee8888STianling Shen status = "okay"; 203*7fee8888STianling Shen}; 204*7fee8888STianling Shen 205*7fee8888STianling Shen&cpu_b0 { 206*7fee8888STianling Shen cpu-supply = <&vdd_cpu_big_s0>; 207*7fee8888STianling Shen}; 208*7fee8888STianling Shen 209*7fee8888STianling Shen&cpu_b1 { 210*7fee8888STianling Shen cpu-supply = <&vdd_cpu_big_s0>; 211*7fee8888STianling Shen}; 212*7fee8888STianling Shen 213*7fee8888STianling Shen&cpu_b2 { 214*7fee8888STianling Shen cpu-supply = <&vdd_cpu_big_s0>; 215*7fee8888STianling Shen}; 216*7fee8888STianling Shen 217*7fee8888STianling Shen&cpu_b3 { 218*7fee8888STianling Shen cpu-supply = <&vdd_cpu_big_s0>; 219*7fee8888STianling Shen}; 220*7fee8888STianling Shen 221*7fee8888STianling Shen&cpu_l0 { 222*7fee8888STianling Shen cpu-supply = <&vdd_cpu_lit_s0>; 223*7fee8888STianling Shen}; 224*7fee8888STianling Shen 225*7fee8888STianling Shen&cpu_l1 { 226*7fee8888STianling Shen cpu-supply = <&vdd_cpu_lit_s0>; 227*7fee8888STianling Shen}; 228*7fee8888STianling Shen 229*7fee8888STianling Shen&cpu_l2 { 230*7fee8888STianling Shen cpu-supply = <&vdd_cpu_lit_s0>; 231*7fee8888STianling Shen}; 232*7fee8888STianling Shen 233*7fee8888STianling Shen&cpu_l3 { 234*7fee8888STianling Shen cpu-supply = <&vdd_cpu_lit_s0>; 235*7fee8888STianling Shen}; 236*7fee8888STianling Shen 237*7fee8888STianling Shen&gpu { 238*7fee8888STianling Shen mali-supply = <&vdd_gpu_s0>; 239*7fee8888STianling Shen status = "okay"; 240*7fee8888STianling Shen}; 241*7fee8888STianling Shen 242*7fee8888STianling Shen&hdmi { 243*7fee8888STianling Shen status = "okay"; 244*7fee8888STianling Shen}; 245*7fee8888STianling Shen 246*7fee8888STianling Shen&hdmi_in { 247*7fee8888STianling Shen hdmi_in_vp0: endpoint { 248*7fee8888STianling Shen remote-endpoint = <&vp0_out_hdmi>; 249*7fee8888STianling Shen }; 250*7fee8888STianling Shen}; 251*7fee8888STianling Shen 252*7fee8888STianling Shen&hdmi_out { 253*7fee8888STianling Shen hdmi_out_con: endpoint { 254*7fee8888STianling Shen remote-endpoint = <&hdmi_con_in>; 255*7fee8888STianling Shen }; 256*7fee8888STianling Shen}; 257*7fee8888STianling Shen 258*7fee8888STianling Shen&hdmi_sound { 259*7fee8888STianling Shen status = "okay"; 260*7fee8888STianling Shen}; 261*7fee8888STianling Shen 262*7fee8888STianling Shen&hdptxphy { 263*7fee8888STianling Shen status = "okay"; 264*7fee8888STianling Shen}; 265*7fee8888STianling Shen 266*7fee8888STianling Shen&i2c1 { 267*7fee8888STianling Shen status = "okay"; 268*7fee8888STianling Shen 269*7fee8888STianling Shen pmic@23 { 270*7fee8888STianling Shen compatible = "rockchip,rk806"; 271*7fee8888STianling Shen reg = <0x23>; 272*7fee8888STianling Shen #gpio-cells = <2>; 273*7fee8888STianling Shen gpio-controller; 274*7fee8888STianling Shen interrupt-parent = <&gpio0>; 275*7fee8888STianling Shen interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 276*7fee8888STianling Shen pinctrl-names = "default"; 277*7fee8888STianling Shen pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 278*7fee8888STianling Shen <&rk806_dvs2_null>, <&rk806_dvs3_null>; 279*7fee8888STianling Shen system-power-controller; 280*7fee8888STianling Shen 281*7fee8888STianling Shen vcc1-supply = <&vcc5v0_sys_s5>; 282*7fee8888STianling Shen vcc2-supply = <&vcc5v0_sys_s5>; 283*7fee8888STianling Shen vcc3-supply = <&vcc5v0_sys_s5>; 284*7fee8888STianling Shen vcc4-supply = <&vcc5v0_sys_s5>; 285*7fee8888STianling Shen vcc5-supply = <&vcc5v0_sys_s5>; 286*7fee8888STianling Shen vcc6-supply = <&vcc5v0_sys_s5>; 287*7fee8888STianling Shen vcc7-supply = <&vcc5v0_sys_s5>; 288*7fee8888STianling Shen vcc8-supply = <&vcc5v0_sys_s5>; 289*7fee8888STianling Shen vcc9-supply = <&vcc5v0_sys_s5>; 290*7fee8888STianling Shen vcc10-supply = <&vcc5v0_sys_s5>; 291*7fee8888STianling Shen vcc11-supply = <&vcc_2v0_pldo_s3>; 292*7fee8888STianling Shen vcc12-supply = <&vcc5v0_sys_s5>; 293*7fee8888STianling Shen vcc13-supply = <&vcc_1v1_nldo_s3>; 294*7fee8888STianling Shen vcc14-supply = <&vcc_1v1_nldo_s3>; 295*7fee8888STianling Shen vcca-supply = <&vcc5v0_sys_s5>; 296*7fee8888STianling Shen 297*7fee8888STianling Shen rk806_dvs1_null: dvs1-null-pins { 298*7fee8888STianling Shen pins = "gpio_pwrctrl1"; 299*7fee8888STianling Shen function = "pin_fun0"; 300*7fee8888STianling Shen }; 301*7fee8888STianling Shen 302*7fee8888STianling Shen rk806_dvs1_pwrdn: dvs1-pwrdn-pins { 303*7fee8888STianling Shen pins = "gpio_pwrctrl1"; 304*7fee8888STianling Shen function = "pin_fun2"; 305*7fee8888STianling Shen }; 306*7fee8888STianling Shen 307*7fee8888STianling Shen rk806_dvs1_rst: dvs1-rst-pins { 308*7fee8888STianling Shen pins = "gpio_pwrctrl1"; 309*7fee8888STianling Shen function = "pin_fun3"; 310*7fee8888STianling Shen }; 311*7fee8888STianling Shen 312*7fee8888STianling Shen rk806_dvs1_slp: dvs1-slp-pins { 313*7fee8888STianling Shen pins = "gpio_pwrctrl1"; 314*7fee8888STianling Shen function = "pin_fun1"; 315*7fee8888STianling Shen }; 316*7fee8888STianling Shen 317*7fee8888STianling Shen rk806_dvs2_dvs: dvs2-dvs-pins { 318*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 319*7fee8888STianling Shen function = "pin_fun4"; 320*7fee8888STianling Shen }; 321*7fee8888STianling Shen 322*7fee8888STianling Shen rk806_dvs2_gpio: dvs2-gpio-pins { 323*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 324*7fee8888STianling Shen function = "pin_fun5"; 325*7fee8888STianling Shen }; 326*7fee8888STianling Shen 327*7fee8888STianling Shen rk806_dvs2_null: dvs2-null-pins { 328*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 329*7fee8888STianling Shen function = "pin_fun0"; 330*7fee8888STianling Shen }; 331*7fee8888STianling Shen 332*7fee8888STianling Shen rk806_dvs2_pwrdn: dvs2-pwrdn-pins { 333*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 334*7fee8888STianling Shen function = "pin_fun2"; 335*7fee8888STianling Shen }; 336*7fee8888STianling Shen 337*7fee8888STianling Shen rk806_dvs2_rst: dvs2-rst-pins { 338*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 339*7fee8888STianling Shen function = "pin_fun3"; 340*7fee8888STianling Shen }; 341*7fee8888STianling Shen 342*7fee8888STianling Shen rk806_dvs2_slp: dvs2-slp-pins { 343*7fee8888STianling Shen pins = "gpio_pwrctrl2"; 344*7fee8888STianling Shen function = "pin_fun1"; 345*7fee8888STianling Shen }; 346*7fee8888STianling Shen 347*7fee8888STianling Shen rk806_dvs3_dvs: dvs3-dvs-pins { 348*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 349*7fee8888STianling Shen function = "pin_fun4"; 350*7fee8888STianling Shen }; 351*7fee8888STianling Shen 352*7fee8888STianling Shen rk806_dvs3_gpio: dvs3-gpio-pins { 353*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 354*7fee8888STianling Shen function = "pin_fun5"; 355*7fee8888STianling Shen }; 356*7fee8888STianling Shen 357*7fee8888STianling Shen rk806_dvs3_null: dvs3-null-pins { 358*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 359*7fee8888STianling Shen function = "pin_fun0"; 360*7fee8888STianling Shen }; 361*7fee8888STianling Shen 362*7fee8888STianling Shen rk806_dvs3_pwrdn: dvs3-pwrdn-pins { 363*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 364*7fee8888STianling Shen function = "pin_fun2"; 365*7fee8888STianling Shen }; 366*7fee8888STianling Shen 367*7fee8888STianling Shen rk806_dvs3_rst: dvs3-rst-pins { 368*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 369*7fee8888STianling Shen function = "pin_fun3"; 370*7fee8888STianling Shen }; 371*7fee8888STianling Shen 372*7fee8888STianling Shen rk806_dvs3_slp: dvs3-slp-pins { 373*7fee8888STianling Shen pins = "gpio_pwrctrl3"; 374*7fee8888STianling Shen function = "pin_fun1"; 375*7fee8888STianling Shen }; 376*7fee8888STianling Shen 377*7fee8888STianling Shen regulators { 378*7fee8888STianling Shen vdd_cpu_big_s0: dcdc-reg1 { 379*7fee8888STianling Shen regulator-always-on; 380*7fee8888STianling Shen regulator-boot-on; 381*7fee8888STianling Shen regulator-enable-ramp-delay = <400>; 382*7fee8888STianling Shen regulator-min-microvolt = <550000>; 383*7fee8888STianling Shen regulator-max-microvolt = <950000>; 384*7fee8888STianling Shen regulator-name = "vdd_cpu_big_s0"; 385*7fee8888STianling Shen regulator-ramp-delay = <12500>; 386*7fee8888STianling Shen 387*7fee8888STianling Shen regulator-state-mem { 388*7fee8888STianling Shen regulator-off-in-suspend; 389*7fee8888STianling Shen }; 390*7fee8888STianling Shen }; 391*7fee8888STianling Shen 392*7fee8888STianling Shen vdd_npu_s0: dcdc-reg2 { 393*7fee8888STianling Shen regulator-boot-on; 394*7fee8888STianling Shen regulator-enable-ramp-delay = <400>; 395*7fee8888STianling Shen regulator-min-microvolt = <550000>; 396*7fee8888STianling Shen regulator-max-microvolt = <950000>; 397*7fee8888STianling Shen regulator-name = "vdd_npu_s0"; 398*7fee8888STianling Shen regulator-ramp-delay = <12500>; 399*7fee8888STianling Shen 400*7fee8888STianling Shen regulator-state-mem { 401*7fee8888STianling Shen regulator-off-in-suspend; 402*7fee8888STianling Shen }; 403*7fee8888STianling Shen }; 404*7fee8888STianling Shen 405*7fee8888STianling Shen vdd_cpu_lit_s0: dcdc-reg3 { 406*7fee8888STianling Shen regulator-always-on; 407*7fee8888STianling Shen regulator-boot-on; 408*7fee8888STianling Shen regulator-min-microvolt = <550000>; 409*7fee8888STianling Shen regulator-max-microvolt = <950000>; 410*7fee8888STianling Shen regulator-name = "vdd_cpu_lit_s0"; 411*7fee8888STianling Shen regulator-ramp-delay = <12500>; 412*7fee8888STianling Shen 413*7fee8888STianling Shen regulator-state-mem { 414*7fee8888STianling Shen regulator-off-in-suspend; 415*7fee8888STianling Shen regulator-suspend-microvolt = <750000>; 416*7fee8888STianling Shen }; 417*7fee8888STianling Shen }; 418*7fee8888STianling Shen 419*7fee8888STianling Shen vcc_3v3_s3: dcdc-reg4 { 420*7fee8888STianling Shen regulator-always-on; 421*7fee8888STianling Shen regulator-boot-on; 422*7fee8888STianling Shen regulator-min-microvolt = <3300000>; 423*7fee8888STianling Shen regulator-max-microvolt = <3300000>; 424*7fee8888STianling Shen regulator-name = "vcc_3v3_s3"; 425*7fee8888STianling Shen 426*7fee8888STianling Shen regulator-state-mem { 427*7fee8888STianling Shen regulator-on-in-suspend; 428*7fee8888STianling Shen regulator-suspend-microvolt = <3300000>; 429*7fee8888STianling Shen }; 430*7fee8888STianling Shen }; 431*7fee8888STianling Shen 432*7fee8888STianling Shen vdd_gpu_s0: dcdc-reg5 { 433*7fee8888STianling Shen regulator-boot-on; 434*7fee8888STianling Shen regulator-enable-ramp-delay = <400>; 435*7fee8888STianling Shen regulator-min-microvolt = <550000>; 436*7fee8888STianling Shen regulator-max-microvolt = <900000>; 437*7fee8888STianling Shen regulator-name = "vdd_gpu_s0"; 438*7fee8888STianling Shen regulator-ramp-delay = <12500>; 439*7fee8888STianling Shen 440*7fee8888STianling Shen regulator-state-mem { 441*7fee8888STianling Shen regulator-off-in-suspend; 442*7fee8888STianling Shen regulator-suspend-microvolt = <850000>; 443*7fee8888STianling Shen }; 444*7fee8888STianling Shen }; 445*7fee8888STianling Shen 446*7fee8888STianling Shen vddq_ddr_s0: dcdc-reg6 { 447*7fee8888STianling Shen regulator-always-on; 448*7fee8888STianling Shen regulator-boot-on; 449*7fee8888STianling Shen regulator-name = "vddq_ddr_s0"; 450*7fee8888STianling Shen 451*7fee8888STianling Shen regulator-state-mem { 452*7fee8888STianling Shen regulator-off-in-suspend; 453*7fee8888STianling Shen }; 454*7fee8888STianling Shen }; 455*7fee8888STianling Shen 456*7fee8888STianling Shen vdd_logic_s0: dcdc-reg7 { 457*7fee8888STianling Shen regulator-always-on; 458*7fee8888STianling Shen regulator-boot-on; 459*7fee8888STianling Shen regulator-min-microvolt = <550000>; 460*7fee8888STianling Shen regulator-max-microvolt = <800000>; 461*7fee8888STianling Shen regulator-name = "vdd_logic_s0"; 462*7fee8888STianling Shen 463*7fee8888STianling Shen regulator-state-mem { 464*7fee8888STianling Shen regulator-off-in-suspend; 465*7fee8888STianling Shen }; 466*7fee8888STianling Shen }; 467*7fee8888STianling Shen 468*7fee8888STianling Shen vcc_1v8_s3: dcdc-reg8 { 469*7fee8888STianling Shen regulator-always-on; 470*7fee8888STianling Shen regulator-boot-on; 471*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 472*7fee8888STianling Shen regulator-max-microvolt = <1800000>; 473*7fee8888STianling Shen regulator-name = "vcc_1v8_s3"; 474*7fee8888STianling Shen 475*7fee8888STianling Shen regulator-state-mem { 476*7fee8888STianling Shen regulator-on-in-suspend; 477*7fee8888STianling Shen regulator-suspend-microvolt = <1800000>; 478*7fee8888STianling Shen }; 479*7fee8888STianling Shen }; 480*7fee8888STianling Shen 481*7fee8888STianling Shen vdd2_ddr_s3: dcdc-reg9 { 482*7fee8888STianling Shen regulator-always-on; 483*7fee8888STianling Shen regulator-boot-on; 484*7fee8888STianling Shen regulator-name = "vdd2_ddr_s3"; 485*7fee8888STianling Shen 486*7fee8888STianling Shen regulator-state-mem { 487*7fee8888STianling Shen regulator-on-in-suspend; 488*7fee8888STianling Shen }; 489*7fee8888STianling Shen }; 490*7fee8888STianling Shen 491*7fee8888STianling Shen vdd_ddr_s0: dcdc-reg10 { 492*7fee8888STianling Shen regulator-always-on; 493*7fee8888STianling Shen regulator-boot-on; 494*7fee8888STianling Shen regulator-min-microvolt = <550000>; 495*7fee8888STianling Shen regulator-max-microvolt = <1200000>; 496*7fee8888STianling Shen regulator-name = "vdd_ddr_s0"; 497*7fee8888STianling Shen 498*7fee8888STianling Shen regulator-state-mem { 499*7fee8888STianling Shen regulator-off-in-suspend; 500*7fee8888STianling Shen }; 501*7fee8888STianling Shen }; 502*7fee8888STianling Shen 503*7fee8888STianling Shen vcca_1v8_s0: pldo-reg1 { 504*7fee8888STianling Shen regulator-always-on; 505*7fee8888STianling Shen regulator-boot-on; 506*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 507*7fee8888STianling Shen regulator-max-microvolt = <1800000>; 508*7fee8888STianling Shen regulator-name = "vcca_1v8_s0"; 509*7fee8888STianling Shen 510*7fee8888STianling Shen regulator-state-mem { 511*7fee8888STianling Shen regulator-off-in-suspend; 512*7fee8888STianling Shen }; 513*7fee8888STianling Shen }; 514*7fee8888STianling Shen 515*7fee8888STianling Shen vcca1v8_pldo2_s0: pldo-reg2 { 516*7fee8888STianling Shen regulator-always-on; 517*7fee8888STianling Shen regulator-boot-on; 518*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 519*7fee8888STianling Shen regulator-max-microvolt = <1800000>; 520*7fee8888STianling Shen regulator-name = "vcca1v8_pldo2_s0"; 521*7fee8888STianling Shen 522*7fee8888STianling Shen regulator-state-mem { 523*7fee8888STianling Shen regulator-off-in-suspend; 524*7fee8888STianling Shen }; 525*7fee8888STianling Shen }; 526*7fee8888STianling Shen 527*7fee8888STianling Shen vdda_1v2_s0: pldo-reg3 { 528*7fee8888STianling Shen regulator-always-on; 529*7fee8888STianling Shen regulator-boot-on; 530*7fee8888STianling Shen regulator-min-microvolt = <1200000>; 531*7fee8888STianling Shen regulator-max-microvolt = <1200000>; 532*7fee8888STianling Shen regulator-name = "vdda_1v2_s0"; 533*7fee8888STianling Shen 534*7fee8888STianling Shen regulator-state-mem { 535*7fee8888STianling Shen regulator-off-in-suspend; 536*7fee8888STianling Shen }; 537*7fee8888STianling Shen }; 538*7fee8888STianling Shen 539*7fee8888STianling Shen vcca_3v3_s0: pldo-reg4 { 540*7fee8888STianling Shen regulator-always-on; 541*7fee8888STianling Shen regulator-boot-on; 542*7fee8888STianling Shen regulator-min-microvolt = <3300000>; 543*7fee8888STianling Shen regulator-max-microvolt = <3300000>; 544*7fee8888STianling Shen regulator-name = "vcca_3v3_s0"; 545*7fee8888STianling Shen 546*7fee8888STianling Shen regulator-state-mem { 547*7fee8888STianling Shen regulator-off-in-suspend; 548*7fee8888STianling Shen }; 549*7fee8888STianling Shen }; 550*7fee8888STianling Shen 551*7fee8888STianling Shen vccio_sd_s0: pldo-reg5 { 552*7fee8888STianling Shen regulator-always-on; 553*7fee8888STianling Shen regulator-boot-on; 554*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 555*7fee8888STianling Shen regulator-max-microvolt = <3300000>; 556*7fee8888STianling Shen regulator-name = "vccio_sd_s0"; 557*7fee8888STianling Shen 558*7fee8888STianling Shen regulator-state-mem { 559*7fee8888STianling Shen regulator-off-in-suspend; 560*7fee8888STianling Shen }; 561*7fee8888STianling Shen }; 562*7fee8888STianling Shen 563*7fee8888STianling Shen vcca1v8_pldo6_s3: pldo-reg6 { 564*7fee8888STianling Shen regulator-always-on; 565*7fee8888STianling Shen regulator-boot-on; 566*7fee8888STianling Shen regulator-min-microvolt = <1800000>; 567*7fee8888STianling Shen regulator-max-microvolt = <1800000>; 568*7fee8888STianling Shen regulator-name = "vcca1v8_pldo6_s3"; 569*7fee8888STianling Shen 570*7fee8888STianling Shen regulator-state-mem { 571*7fee8888STianling Shen regulator-on-in-suspend; 572*7fee8888STianling Shen regulator-suspend-microvolt = <1800000>; 573*7fee8888STianling Shen }; 574*7fee8888STianling Shen }; 575*7fee8888STianling Shen 576*7fee8888STianling Shen vdd_0v75_s3: nldo-reg1 { 577*7fee8888STianling Shen regulator-always-on; 578*7fee8888STianling Shen regulator-boot-on; 579*7fee8888STianling Shen regulator-min-microvolt = <750000>; 580*7fee8888STianling Shen regulator-max-microvolt = <750000>; 581*7fee8888STianling Shen regulator-name = "vdd_0v75_s3"; 582*7fee8888STianling Shen 583*7fee8888STianling Shen regulator-state-mem { 584*7fee8888STianling Shen regulator-on-in-suspend; 585*7fee8888STianling Shen regulator-suspend-microvolt = <750000>; 586*7fee8888STianling Shen }; 587*7fee8888STianling Shen }; 588*7fee8888STianling Shen 589*7fee8888STianling Shen vdda_ddr_pll_s0: nldo-reg2 { 590*7fee8888STianling Shen regulator-always-on; 591*7fee8888STianling Shen regulator-boot-on; 592*7fee8888STianling Shen regulator-min-microvolt = <850000>; 593*7fee8888STianling Shen regulator-max-microvolt = <850000>; 594*7fee8888STianling Shen regulator-name = "vdda_ddr_pll_s0"; 595*7fee8888STianling Shen 596*7fee8888STianling Shen regulator-state-mem { 597*7fee8888STianling Shen regulator-off-in-suspend; 598*7fee8888STianling Shen }; 599*7fee8888STianling Shen }; 600*7fee8888STianling Shen 601*7fee8888STianling Shen vdda0v75_hdmi_s0: nldo-reg3 { 602*7fee8888STianling Shen regulator-always-on; 603*7fee8888STianling Shen regulator-boot-on; 604*7fee8888STianling Shen regulator-min-microvolt = <837500>; 605*7fee8888STianling Shen regulator-max-microvolt = <837500>; 606*7fee8888STianling Shen regulator-name = "vdda0v75_hdmi_s0"; 607*7fee8888STianling Shen 608*7fee8888STianling Shen regulator-state-mem { 609*7fee8888STianling Shen regulator-off-in-suspend; 610*7fee8888STianling Shen }; 611*7fee8888STianling Shen }; 612*7fee8888STianling Shen 613*7fee8888STianling Shen vdda_0v85_s0: nldo-reg4 { 614*7fee8888STianling Shen regulator-always-on; 615*7fee8888STianling Shen regulator-boot-on; 616*7fee8888STianling Shen regulator-min-microvolt = <850000>; 617*7fee8888STianling Shen regulator-max-microvolt = <850000>; 618*7fee8888STianling Shen regulator-name = "vdda_0v85_s0"; 619*7fee8888STianling Shen 620*7fee8888STianling Shen regulator-state-mem { 621*7fee8888STianling Shen regulator-off-in-suspend; 622*7fee8888STianling Shen }; 623*7fee8888STianling Shen }; 624*7fee8888STianling Shen 625*7fee8888STianling Shen vdda_0v75_s0: nldo-reg5 { 626*7fee8888STianling Shen regulator-always-on; 627*7fee8888STianling Shen regulator-boot-on; 628*7fee8888STianling Shen regulator-min-microvolt = <750000>; 629*7fee8888STianling Shen regulator-max-microvolt = <750000>; 630*7fee8888STianling Shen regulator-name = "vdda_0v75_s0"; 631*7fee8888STianling Shen 632*7fee8888STianling Shen regulator-state-mem { 633*7fee8888STianling Shen regulator-off-in-suspend; 634*7fee8888STianling Shen }; 635*7fee8888STianling Shen }; 636*7fee8888STianling Shen }; 637*7fee8888STianling Shen }; 638*7fee8888STianling Shen}; 639*7fee8888STianling Shen 640*7fee8888STianling Shen&i2c2 { 641*7fee8888STianling Shen status = "okay"; 642*7fee8888STianling Shen 643*7fee8888STianling Shen hym8563: rtc@51 { 644*7fee8888STianling Shen compatible = "haoyu,hym8563"; 645*7fee8888STianling Shen reg = <0x51>; 646*7fee8888STianling Shen #clock-cells = <0>; 647*7fee8888STianling Shen clock-output-names = "hym8563"; 648*7fee8888STianling Shen interrupt-parent = <&gpio0>; 649*7fee8888STianling Shen interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>; 650*7fee8888STianling Shen pinctrl-names = "default"; 651*7fee8888STianling Shen pinctrl-0 = <&rtc_int_l>; 652*7fee8888STianling Shen wakeup-source; 653*7fee8888STianling Shen }; 654*7fee8888STianling Shen}; 655*7fee8888STianling Shen 656*7fee8888STianling Shen&pcie0 { 657*7fee8888STianling Shen pinctrl-names = "default"; 658*7fee8888STianling Shen pinctrl-0 = <&pcie0_perstn>; 659*7fee8888STianling Shen reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; 660*7fee8888STianling Shen vpcie3v3-supply = <&vcc_3v3_s3>; 661*7fee8888STianling Shen status = "okay"; 662*7fee8888STianling Shen}; 663*7fee8888STianling Shen 664*7fee8888STianling Shen&pcie1 { 665*7fee8888STianling Shen pinctrl-names = "default"; 666*7fee8888STianling Shen pinctrl-0 = <&pcie1_perstn>; 667*7fee8888STianling Shen reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 668*7fee8888STianling Shen vpcie3v3-supply = <&vcc_3v3_s3>; 669*7fee8888STianling Shen status = "okay"; 670*7fee8888STianling Shen}; 671*7fee8888STianling Shen 672*7fee8888STianling Shen&pinctrl { 673*7fee8888STianling Shen bt { 674*7fee8888STianling Shen bt_reg_on_h: bt-reg-on-h { 675*7fee8888STianling Shen rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 676*7fee8888STianling Shen }; 677*7fee8888STianling Shen 678*7fee8888STianling Shen bt_wake_host_h: bt-wake-host-h { 679*7fee8888STianling Shen rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>; 680*7fee8888STianling Shen }; 681*7fee8888STianling Shen 682*7fee8888STianling Shen host_wake_bt_h: host-wake-bt-h { 683*7fee8888STianling Shen rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; 684*7fee8888STianling Shen }; 685*7fee8888STianling Shen }; 686*7fee8888STianling Shen 687*7fee8888STianling Shen gpio-keys { 688*7fee8888STianling Shen user_but_pin: user-but-pin { 689*7fee8888STianling Shen rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; 690*7fee8888STianling Shen }; 691*7fee8888STianling Shen }; 692*7fee8888STianling Shen 693*7fee8888STianling Shen gpio-leds { 694*7fee8888STianling Shen led_sys_h: led-sys-h { 695*7fee8888STianling Shen rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 696*7fee8888STianling Shen }; 697*7fee8888STianling Shen 698*7fee8888STianling Shen led1_h: led1-h { 699*7fee8888STianling Shen rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 700*7fee8888STianling Shen }; 701*7fee8888STianling Shen 702*7fee8888STianling Shen led2_h: led2-h { 703*7fee8888STianling Shen rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 704*7fee8888STianling Shen }; 705*7fee8888STianling Shen }; 706*7fee8888STianling Shen 707*7fee8888STianling Shen hdmi { 708*7fee8888STianling Shen hdmi_tx_on_h: hdmi-tx-on-h { 709*7fee8888STianling Shen rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 710*7fee8888STianling Shen }; 711*7fee8888STianling Shen }; 712*7fee8888STianling Shen 713*7fee8888STianling Shen hym8563 { 714*7fee8888STianling Shen rtc_int_l: rtc-int-l { 715*7fee8888STianling Shen rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 716*7fee8888STianling Shen }; 717*7fee8888STianling Shen }; 718*7fee8888STianling Shen 719*7fee8888STianling Shen pcie { 720*7fee8888STianling Shen pcie0_perstn: pcie0-perstn { 721*7fee8888STianling Shen rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 722*7fee8888STianling Shen }; 723*7fee8888STianling Shen 724*7fee8888STianling Shen pcie1_perstn: pcie1-perstn { 725*7fee8888STianling Shen rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 726*7fee8888STianling Shen }; 727*7fee8888STianling Shen }; 728*7fee8888STianling Shen 729*7fee8888STianling Shen usb { 730*7fee8888STianling Shen usb_otg0_pwren_h: usb-otg0-pwren-h { 731*7fee8888STianling Shen rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 732*7fee8888STianling Shen }; 733*7fee8888STianling Shen }; 734*7fee8888STianling Shen 735*7fee8888STianling Shen wifi { 736*7fee8888STianling Shen wifi_wake_host_h: wifi-wake-host-h { 737*7fee8888STianling Shen rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; 738*7fee8888STianling Shen }; 739*7fee8888STianling Shen 740*7fee8888STianling Shen wifi_reg_on_h: wifi-reg-on-h { 741*7fee8888STianling Shen rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 742*7fee8888STianling Shen }; 743*7fee8888STianling Shen }; 744*7fee8888STianling Shen}; 745*7fee8888STianling Shen 746*7fee8888STianling Shen&sai6 { 747*7fee8888STianling Shen status = "okay"; 748*7fee8888STianling Shen}; 749*7fee8888STianling Shen 750*7fee8888STianling Shen&sdmmc { 751*7fee8888STianling Shen bus-width = <4>; 752*7fee8888STianling Shen cap-mmc-highspeed; 753*7fee8888STianling Shen cap-sd-highspeed; 754*7fee8888STianling Shen disable-wp; 755*7fee8888STianling Shen no-mmc; 756*7fee8888STianling Shen no-sdio; 757*7fee8888STianling Shen sd-uhs-sdr104; 758*7fee8888STianling Shen vmmc-supply = <&vcc_3v3_s3>; 759*7fee8888STianling Shen vqmmc-supply = <&vccio_sd_s0>; 760*7fee8888STianling Shen status = "okay"; 761*7fee8888STianling Shen}; 762*7fee8888STianling Shen 763*7fee8888STianling Shen&sdio { 764*7fee8888STianling Shen #address-cells = <1>; 765*7fee8888STianling Shen #size-cells = <0>; 766*7fee8888STianling Shen bus-width = <4>; 767*7fee8888STianling Shen cap-sd-highspeed; 768*7fee8888STianling Shen cap-sdio-irq; 769*7fee8888STianling Shen disable-wp; 770*7fee8888STianling Shen keep-power-in-suspend; 771*7fee8888STianling Shen mmc-pwrseq = <&sdio_pwrseq>; 772*7fee8888STianling Shen no-mmc; 773*7fee8888STianling Shen no-sd; 774*7fee8888STianling Shen non-removable; 775*7fee8888STianling Shen sd-uhs-sdr104; 776*7fee8888STianling Shen vmmc-supply = <&vcc_3v3_s3>; 777*7fee8888STianling Shen vqmmc-supply = <&vcc_1v8_s3>; 778*7fee8888STianling Shen wakeup-source; 779*7fee8888STianling Shen status = "okay"; 780*7fee8888STianling Shen 781*7fee8888STianling Shen rtl8822cs: wifi@1 { 782*7fee8888STianling Shen reg = <1>; 783*7fee8888STianling Shen interrupt-parent = <&gpio0>; 784*7fee8888STianling Shen interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 785*7fee8888STianling Shen interrupt-names = "host-wake"; 786*7fee8888STianling Shen pinctrl-names = "default"; 787*7fee8888STianling Shen pinctrl-0 = <&wifi_wake_host_h>; 788*7fee8888STianling Shen }; 789*7fee8888STianling Shen}; 790*7fee8888STianling Shen 791*7fee8888STianling Shen&sdhci { 792*7fee8888STianling Shen bus-width = <8>; 793*7fee8888STianling Shen cap-mmc-highspeed; 794*7fee8888STianling Shen full-pwr-cycle-in-suspend; 795*7fee8888STianling Shen mmc-hs400-1_8v; 796*7fee8888STianling Shen mmc-hs400-enhanced-strobe; 797*7fee8888STianling Shen no-sdio; 798*7fee8888STianling Shen no-sd; 799*7fee8888STianling Shen non-removable; 800*7fee8888STianling Shen status = "okay"; 801*7fee8888STianling Shen}; 802*7fee8888STianling Shen 803*7fee8888STianling Shen&saradc { 804*7fee8888STianling Shen vref-supply = <&vcca_1v8_s0>; 805*7fee8888STianling Shen status = "okay"; 806*7fee8888STianling Shen}; 807*7fee8888STianling Shen 808*7fee8888STianling Shen&u2phy0 { 809*7fee8888STianling Shen status = "okay"; 810*7fee8888STianling Shen}; 811*7fee8888STianling Shen 812*7fee8888STianling Shen&u2phy0_otg { 813*7fee8888STianling Shen phy-supply = <&vcc5v0_usb_otg0>; 814*7fee8888STianling Shen status = "okay"; 815*7fee8888STianling Shen}; 816*7fee8888STianling Shen 817*7fee8888STianling Shen&uart0 { 818*7fee8888STianling Shen status = "okay"; 819*7fee8888STianling Shen}; 820*7fee8888STianling Shen 821*7fee8888STianling Shen&uart5 { 822*7fee8888STianling Shen pinctrl-names = "default"; 823*7fee8888STianling Shen pinctrl-0 = <&uart5m0_xfer &uart5m0_ctsn &uart5m0_rtsn>; 824*7fee8888STianling Shen uart-has-rtscts; 825*7fee8888STianling Shen status = "okay"; 826*7fee8888STianling Shen 827*7fee8888STianling Shen bluetooth { 828*7fee8888STianling Shen compatible = "realtek,rtl8822cs-bt"; 829*7fee8888STianling Shen enable-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; 830*7fee8888STianling Shen device-wake-gpios = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>; 831*7fee8888STianling Shen host-wake-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 832*7fee8888STianling Shen pinctrl-names = "default"; 833*7fee8888STianling Shen pinctrl-0 = <&bt_wake_host_h &host_wake_bt_h &bt_reg_on_h>; 834*7fee8888STianling Shen }; 835*7fee8888STianling Shen}; 836*7fee8888STianling Shen 837*7fee8888STianling Shen&usbdp_phy { 838*7fee8888STianling Shen status = "okay"; 839*7fee8888STianling Shen}; 840*7fee8888STianling Shen 841*7fee8888STianling Shen&usb_drd0_dwc3 { 842*7fee8888STianling Shen dr_mode = "host"; 843*7fee8888STianling Shen extcon = <&u2phy0>; 844*7fee8888STianling Shen status = "okay"; 845*7fee8888STianling Shen}; 846*7fee8888STianling Shen 847*7fee8888STianling Shen&vop { 848*7fee8888STianling Shen status = "okay"; 849*7fee8888STianling Shen}; 850*7fee8888STianling Shen 851*7fee8888STianling Shen&vop_mmu { 852*7fee8888STianling Shen status = "okay"; 853*7fee8888STianling Shen}; 854*7fee8888STianling Shen 855*7fee8888STianling Shen&vp0 { 856*7fee8888STianling Shen vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 857*7fee8888STianling Shen reg = <ROCKCHIP_VOP2_EP_HDMI0>; 858*7fee8888STianling Shen remote-endpoint = <&hdmi_in_vp0>; 859*7fee8888STianling Shen }; 860*7fee8888STianling Shen}; 861