Home
last modified time | relevance | path

Searched +full:long +full:- +full:ram +full:- +full:code (Results 1 – 25 of 460) sorted by relevance

12345678910>>...19

/linux/drivers/net/ethernet/amd/
H A Dmvme147.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Uses the generic 7990.c LANCE code.
30 /* We have 32K of RAM for the init block and buffers. This places
37 #include "7990.h" /* use generic LANCE code */
42 unsigned long ram; member
47 * plus board-specific init, open and close actions.
48 * Oh, and we need to tell the generic code how to read and write LANCE registers...
70 /* Initialise the one and only on-board 7990 */
83 return ERR_PTR(-ENODEV); in mvme147lance_probe()
88 return ERR_PTR(-ENOMEM); in mvme147lance_probe()
[all …]
/linux/arch/m68k/atari/
H A Dstram.c2 * Functions for ST-RAM allocations
4 * Copyright 1994-97 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
35 * The ST-RAM allocator allocates memory from a pool of reserved ST-RAM of
36 * configurable size, set aside on ST-RAM init.
37 * As long as this pool is not exhausted, allocation of real ST-RAM can be
41 /* set if kernel is in ST-RAM */
45 .name = "ST-RAM Pool"
48 static unsigned long pool_size = 1024*1024;
50 static unsigned long stram_virt_offset;
73 * determine whether kernel code resides in ST-RAM in atari_stram_init()
[all …]
/linux/include/linux/
H A Dcrash_dump.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #define ELFCORE_ADDR_MAX (-1ULL)
13 #define ELFCORE_ADDR_ERR (-2ULL)
15 extern unsigned long long elfcorehdr_addr;
16 extern unsigned long long elfcorehdr_size;
19 extern int elfcorehdr_alloc(unsigned long lon
[all...]
H A Dhp_sdc.h2 * HP i8042 System Device Controller -- header
10 * 1. Redistributions of source code must retain the above copyright
31 * HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
34 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2
104 #define HP_SDC_STATUS_PUP 0x70 /* Successful power-up self test */
134 #define HP_SDC_STR 0x7f /* i8042 self-test result */
146 #define HP_SDC_CFG_ROLLOVER 0x08 /* WTF is "N-key rollover"? */
149 #define HP_SDC_CFG_KBD_OLD 0x03 /* keyboard code for non-HIL */
150 #define HP_SDC_CFG_KBD_NEW 0x07 /* keyboard code from HIL autoconfig */
151 #define HP_SDC_CFG_REV 0x40 /* Code revision bit */
[all …]
H A Dedac.h6 * 2006-2008 (c) MontaVista Software, Inc. This file is licensed under
26 #define EDAC_OPSTATE_INVAL -1
60 * enum dev_type - describe the type of memory DRAM chips used at the stick
93 * enum hw_event_mc_err_type - type of the detected error
95 * @HW_EVENT_ERR_CORRECTED: Corrected Error - Indicates that an ECC
97 * @HW_EVENT_ERR_UNCORRECTED: Uncorrected Error - Indicates an error that
101 * it for example, by re-trying the operation).
102 * @HW_EVENT_ERR_DEFERRED: Deferred Error - Indicates an uncorrectable
108 * @HW_EVENT_ERR_FATAL: Fatal Error - Uncorrected error that could not
110 * @HW_EVENT_ERR_INFO: Informational - The CPER spec defines a forth
[all …]
/linux/arch/arm/kernel/
H A Dreboot.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
17 typedef void (*phys_reset_t)(unsigned long, bool);
30 * code.
54 phys_reset((unsigned long)addr, is_hyp_mode_available()); in __soft_restart()
60 void _soft_restart(unsigned long addr, bool disable_l2) in _soft_restart()
79 void soft_restart(unsigned long addr) in soft_restart()
88 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
89 * kexec'd kernel to use any and all RAM as it sees fit, without having to
90 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
[all …]
H A Dtcm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2008-2009 ST-Ericsson AB
41 .name = "DTCM RAM",
48 .name = "ITCM RAM",
77 unsigned long vaddr; in tcm_alloc()
95 gen_pool_free(tcm_pool, (unsigned long) addr, len); in tcm_free()
114 const int tcm_sizes[16] = { 0, -1, -1, 4, 8, 16, 32, 64, 128, in setup_tcm_bank()
115 256, 512, 1024, -1, -1, -1, -1 }; in setup_tcm_bank()
141 return -EINVAL; in setup_tcm_bank()
145 return -EINVAL; in setup_tcm_bank()
[all …]
H A Dhead-common.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/head-common.S
5 * Copyright (C) 1994-2002 Russell King
18 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
33 * that the pointer be aligned, in the first 16k of physical RAM and
68 * The following fragment of code is executed with the MMU on in MMU mode,
71 * r0 = cp#15 control register (exc_ret for M-class)
90 bl __inflate_kernel_data @ decompress .data to RAM
98 bl __memcpy @ copy .data to RAM
129 .long _sdata @ r0
[all …]
/linux/arch/microblaze/kernel/
H A Dsetup.c2 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
32 #include <linux/dma-mapping.h>
46 * ASM code. Default position is BSS section which is cleared
70 code (ie no point checking for CRAMFS if it's not even enabled) */
74 if (memcmp(&addr[0], "-rom1fs-", 8) == 0) /* romfs */ in get_romfs_len()
86 unsigned long kernel_tlb;
88 void __init machine_early_init(const char *cmdline, unsigned int ram, in machine_early_init() argument
92 unsigned long *src, *dst; in machine_early_init()
104 romfs_base = (ram ? ram : (unsigned int)&__init_end); in machine_early_init()
[all …]
/linux/arch/m68k/coldfire/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * head.S -- common startup code for ColdFire CPUs.
7 * (C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
14 #include <asm/asm-offsets.h>
23 * If we don't have a fixed memory size, then lets build in code
26 * that do not have their RAM starting at address 0, and it only
40 * but the DCMR register is virtually identical - give or take
119 * During startup we store away the RAM setup. These are not in the
124 .long 0
126 .long 0
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dnvidia,tegra20-apbmisc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/nvidia,tegra20-apbmisc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - items:
17 - enum:
18 - nvidia,tegra210-apbmisc
19 - nvidia,tegra124-apbmisc
[all …]
/linux/arch/x86/kernel/
H A Debda.c1 // SPDX-License-Identifier: GPL-2.0
12 * are code), that must not be used by the kernel as available
13 * RAM.
20 * guess the reserved BIOS area by looking at the low BIOS RAM size
26 * - This code also contains a quirk for Dell systems that neglect
27 * to reserve the EBDA area in the 'RAM size' value ...
29 * - The same quirk also avoids a problem with the AMD768MPX
34 * - Plus paravirt systems don't have a reliable value in the
35 * 'BIOS RAM size' pointer we can rely on, so we must quirk
43 * rarely a problem, as long as we have enough memory to install
[all …]
H A De820.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * allocation code routines via a platform independent interface (memblock, etc.).
16 #include <linux/firmware-map.h>
26 * - 'e820_table_firmware': the original firmware version passed to us by the
27 * bootloader - not modified by the kernel. It is composed of two parts:
31 * - inform the user about the firmware's notion of memory layout
34 * - th
[all...]
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_migrate.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
25 #include <linux/dma-direction.h>
26 #include <linux/dma-mapping.h>
52 struct amdgpu_device *adev = ring->adev; in svm_migrate_gart_map()
62 *gart_addr = adev->gmc.gart_start; in svm_migrate_gart_map()
64 num_dw = ALIGN(adev->mman.buffer_funcs->copy_num_dw, 8); in svm_migrate_gart_map()
67 r = amdgpu_job_alloc_with_ib(adev, &adev->mman.high_pr, in svm_migrate_gart_map()
76 src_addr += job->ibs[0].gpu_addr; in svm_migrate_gart_map()
78 dst_addr = amdgpu_bo_gpu_offset(adev->gart.bo); in svm_migrate_gart_map()
[all …]
/linux/kernel/
H A Dresource_kunit.c1 // SPDX-License-Identifier: GPL-2.0+
90 KUNIT_EXPECT_EQ_MSG(test, r->start, exp_r->start, "Start elements are not equal"); in resource_do_test()
91 KUNIT_EXPECT_EQ_MSG(test, r->end, exp_r->end, "End elements are not equal"); in resource_do_test()
100 ret = resource_union(r->r1, r->r2, &result); in resource_do_union_test()
101 resource_do_test(test, ret, &result, r->ret, &r->r, r->r1, r->r2); in resource_do_union_test()
104 ret = resource_union(r->r2, r->r1, &result); in resource_do_union_test()
105 resource_do_test(test, ret, &result, r->ret, &r->r, r->r2, r->r1); in resource_do_union_test()
124 ret = resource_intersection(r->r1, r->r2, &result); in resource_do_intersection_test()
125 resource_do_test(test, ret, &result, r->ret, &r->r, r->r1, r->r2); in resource_do_intersection_test()
128 ret = resource_intersection(r->r2, r->r1, &result); in resource_do_intersection_test()
[all …]
/linux/include/soc/fsl/qe/
H A Dqe.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
97 s32 cpm_muram_alloc(unsigned long size, unsigned long align);
98 s32 devm_cpm_muram_alloc(struct device *dev, unsigned long size,
99 unsigned long align);
101 s32 cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
102 s32 devm_cpm_muram_alloc_fixed(struct device *dev, unsigned long offset,
103 unsigned long size);
104 void __iomem *cpm_muram_addr(unsigned long offset);
105 unsigned long cpm_muram_offset(const void __iomem *addr);
109 static inline s32 cpm_muram_alloc(unsigned long size, in cpm_muram_alloc()
[all …]
/linux/arch/x86/mm/
H A Dinit.c28 #include <asm/text-patching.h>
44 * WC and WT fall back to UC-. pat_init() updates these values to support
46 * for the details. Note, __early_ioremap() used during early boot-time
63 unsigned long cachemode2protval(enum page_cache_mode pcm) in cachemode2protval()
83 * Check that the write-protect PAT entry is set for write-protect.
100 unsigned long masked; in pgprot2cachemode()
108 static unsigned long __initdata pgt_buf_start;
109 static unsigned long __initdata pgt_buf_end;
110 static unsigned long __initdata pgt_buf_top;
112 static unsigned long min_pfn_mapped;
[all …]
/linux/arch/nios2/kernel/
H A Dhead.S23 #include <asm/asm-offsets.h>
24 #include <asm/asm-macros.h>
27 * ZERO_PAGE is a special page that is used for zero-initialized
46 .long 0
48 * Input(s): passed from u-boot
49 * r4 - Optional pointer to a board information structure.
50 * r5 - Optional pointer to the physical starting address of the init RAM
52 * r6 - Optional pointer to the physical ending address of the init RAM
54 * r7 - Optional pointer to the physical starting address of any kernel
55 * command-line parameters.
[all …]
/linux/arch/mips/kernel/
H A Dsetup.c28 #include <linux/dma-map-ops.h>
44 #include <asm/smp-ops.h>
45 #include <asm/mips-cps.h>
62 unsigned long mips_machtype __read_mostly = MACH_UNKNOWN;
79 unsigned long mips_io_port_base = -1;
82 static struct resource code_resource = { .name = "Kernel code", };
86 unsigned long __kaslr_offset __ro_after_init;
92 unsigned long ARCH_PFN_OFFSE
[all...]
/linux/drivers/net/wan/
H A Dwanxlfw.S1 /* SPDX-License-Identifier: GPL-2.0-only */
14 0x000 - 0x050 TX#0 0x050 - 0x140 RX#0
15 0x140 - 0x190 TX#1 0x190 - 0x280 RX#1
16 0x280 - 0x2D0 TX#2 0x2D0 - 0x3C0 RX#2
17 0x3C0 - 0x410 TX#3 0x410 - 0x500 RX#3
20 000 5FF 1536 Bytes Dual-Port RAM User Data / BDs
21 600 6FF 256 Bytes Dual-Port RAM User Data / BDs
22 700 7FF 256 Bytes Dual-Port RAM User Data / BDs
23 C00 CBF 192 Bytes Dual-Port RAM Parameter RAM Page 1
24 D00 DBF 192 Bytes Dual-Port RAM Parameter RAM Page 2
[all …]
/linux/drivers/soc/fsl/qe/
H A Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Common CPM code
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
57 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
60 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init()
63 ret = -ENODEV; in cpm_muram_init()
68 muram_pool = gen_pool_create(0, -1); in cpm_muram_init()
71 ret = -ENOMEM; in cpm_muram_init()
77 ret = -ENODEV; in cpm_muram_init()
[all …]
/linux/arch/x86/include/asm/
H A Dsuspend_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2001-2003 Pavel Machek <pavel@suse.cz>
4 * Based on code
15 * RAM code and by the low level hibernation code.
39 unsigned long kernelmode_gs_base, usermode_gs_base, fs_base;
41 unsigned long cr0, cr2, cr3, cr4;
44 unsigned long efer;
51 unsigned long tr;
52 unsigned long safety;
53 unsigned long return_address;
[all …]
/linux/arch/m68k/68000/
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * head.S - Common startup code for 68000 core based CPU's
16 #include <asm/asm-offsets.h>
21 * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
24 #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
47 * RAM setup pointers. Used by the kernel to determine RAM location and size.
51 .long 0
53 .long 0
55 .long 0
57 .long 0
[all …]
/linux/drivers/mtd/chips/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "RAM/ROM/Flash chip drivers"
13 support any device that is CFI-compliant, you need to enable this
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
24 CFI-targeted flash drivers for any chips which are identified which
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
39 option does not directly affect the code, but will enable other
53 are expected to be wired to the CPU in 'host-endian' form.
78 This option does not affect the code directly, but will enable
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-emc.yaml1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
15 The EMC interfaces with the off-chip SDRAM to service the request stream
16 sent from Memory Controller. The EMC also has various performance-affecting
23 const: nvidia,tegra30-emc
[all …]

12345678910>>...19