Lines Matching +full:long +full:- +full:ram +full:- +full:code
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/kernel/head-common.S
5 * Copyright (C) 1994-2002 Russell King
18 #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */
33 * that the pointer be aligned, in the first 16k of physical RAM and
68 * The following fragment of code is executed with the MMU on in MMU mode,
71 * r0 = cp#15 control register (exc_ret for M-class)
90 bl __inflate_kernel_data @ decompress .data to RAM
98 bl __memcpy @ copy .data to RAM
129 .long _sdata @ r0
130 .long __data_loc @ r1
131 .long _edata_loc @ r2
133 .long __bss_stop @ sp (temporary stack in .bss)
136 .long __bss_start @ r0
137 .long __bss_stop @ r1
138 .long init_thread_union + THREAD_START_SP @ sp
140 .long processor_id @ r0
141 .long __machine_arch_type @ r1
142 .long __atags_pointer @ r2
144 .long cr_alignment @ r3
146 M_CLASS(.long exc_ret) @ r3
147 AR_CLASS(.long 0) @ r3
149 .size __mmap_switched_data, . - __mmap_switched_data
155 * This provides a C-API version of __lookup_processor_type
158 stmfd sp!, {r4 - r6, r9, lr}
162 ldmfd sp!, {r4 - r6, r9, pc}
166 * Read processor ID register (CP#15, CR0), and look up in the linker-built
226 * Turn the screen red on a error - RiscPC only.