| /linux/include/uapi/drm/ |
| H A D | drm_fourcc.h | 39 * further describe the buffer's format - for example tiling or compression.
42 * ---------
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| /linux/Documentation/devicetree/bindings/ |
| H A D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
[all …]
|
| /linux/drivers/crypto/cavium/cpt/ |
| H A D | cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
42 * Address must be 16-byte aligned.
44 * sign-extended bit <48> for forward compatibility.
46 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
48 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
56 * work-queue entry that CPT submits work to SSO after all context,
60 * use a sign-extended bit <48> for forward compatibility.
76 #if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
80 #else /* Word 0 - Little Endian */
[all …]
|
| /linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
[all …]
|
| /linux/Documentation/devicetree/bindings/regmap/ |
| H A D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
|
| /linux/include/linux/ |
| H A D | pe.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * - 0x1: initrd loading from the LINUX_EFI_INITRD_MEDIA_GUID device path,
17 * - 0x2: initrd loading using the initrd= command line option, where the file
30 * (https://lore.kernel.org/all/efd6f2d4-547c-1378-1faa-53c044dbd297@gmail.com/)
36 * LINUX_PE_MAGIC appears at offset 0x38 into the MS-DOS header of EFI bootable
53 #define IMAGE_FILE_MACHINE_ALPHA_OLD 0x0183 /* DEC Alpha AXP 32-bit (old images) */
54 #define IMAGE_FILE_MACHINE_ALPHA 0x0184 /* DEC Alpha AXP 32-bit */
55 #define IMAGE_FILE_MACHINE_ALPHA64 0x0284 /* DEC Alpha AXP 64-bit (with 8kB page size) */
59 #define IMAGE_FILE_MACHINE_ARM 0x01c0 /* ARM Little-Endian (ARMv4) */
60 #define IMAGE_FILE_MACHINE_THUMB 0x01c2 /* ARM Thumb Little-Endian (ARMv4T) */
[all …]
|
| /linux/drivers/media/dvb-frontends/ |
| H A D | atbm8830_priv.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
39 #define REG_CARRIER_OFFSET 0x0827 /* 0x0827-0x0829 little endian */
42 #define REG_IF_FREQ 0x0A00 /* 0x0A00-0x0A02 little endian */
43 #define REG_OSC_CLK 0x0A03 /* 0x0A03-0x0A05 little endian */
54 #define REG_AGC_TARGET 0x1003 /* 0x1003-0x1005 little endian */
58 #define REG_AGC_PWM_VAL 0x1028 /* 0x1028-0x1029 little endian */
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]
|
| H A D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
|
| H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
[all …]
|
| /linux/include/uapi/linux/ |
| H A D | virtio_pcidev.h | 1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
11 * enum virtio_pcidev_ops - virtual PCI device operations
14 * the @data field should be filled in by the device (in little endian).
16 * the @data field contains the data to write (in little endian).
18 * the @data field should be filled in by the device (in little endian).
20 * the @data field contains the data to write (in little endian).
23 * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
25 * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
26 * the 16- or 32-bit write that would otherwise be done into memory,
44 * struct virtio_pcidev_msg - virtio PCI device operation
[all …]
|
| /linux/drivers/crypto/marvell/octeontx/ |
| H A D | otx_cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0
154 * CPT OcteonTX VF MSI-X Vector Enumeration
155 * Enumerates the MSI-X interrupt vectors.
167 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
179 * Address must be 16-byte aligned.
181 * sign-extended bit <48> for forward compatibility.
183 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
185 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
193 * work-queue entry that CPT submits work to SSO after all context,
197 * use a sign-extended bit <48> for forward compatibility.
[all …]
|
| /linux/Documentation/translations/zh_CN/arch/riscv/ |
| H A D | boot-image-header.rst | 1 .. include:: ../../disclaimer-zh_CN.rst
3 :Original: Documentation/arch/riscv/boot-image-header.rst
9 .. _cn_boot-image-header.rst:
12 RISC-V Linux启动镜像文件头
18 此文档仅描述RISC-V Linux 启动文件头的详情。
27 u64 text_offset; /* Image load offset, little endian */
28 u64 image_size; /* Effective Image size, little endian */
29 u64 flags; /* kernel flags, little endian */
33 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
34 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
[all …]
|
| /linux/Documentation/arch/riscv/ |
| H A D | boot-image-header.rst | 2 Boot image header in RISC-V Linux
8 This document only describes the boot image header details for RISC-V Linux.
10 The following 64-byte header is present in decompressed Linux kernel image::
14 u64 text_offset; /* Image load offset, little endian */
15 u64 image_size; /* Effective Image size, little endian */
16 u64 flags; /* kernel flags, little endian */
20 u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
21 u32 magic2 = 0x05435352; /* Magic number 2, little endian, "RSC\x05" */
25 ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
31 - This header is also reused to support EFI stub for RISC-V. EFI specification
[all …]
|
| /linux/arch/sparc/include/uapi/asm/ |
| H A D | asi.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
37 /* SPARCstation-5: only 6 bits are decoded. */
69 /* Block-copy operations are available only on certain V8 cpus. */
79 /* Block-fill operations are available on certain V8 cpus */
83 * the available ASI's for physical ram pass-through, but I don't have
89 #define ASI_M_VMEUS 0x2A /* VME user 16-bit access */
90 #define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */
91 #define ASI_M_VMEUT 0x2C /* VME user 32-bit access */
92 #define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */
128 #define ASI_NL 0x0c /* Nucleus, little endian */
[all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | debugfs-scmi-raw | 7 in little-endian binary format to have it sent to the configured
22 in little-endian binary format to have it sent to the configured
40 little-endian binary format to have it sent to the configured
55 polling-mode; write a complete SCMI asynchronous command message
56 (header included) in little-endian binary format to have it sent
58 polling-mode on the reception path of the immediate part of the
74 Description: SCMI Raw message errors facility; any kind of timed-out or
101 different test-run.
110 in little-endian binary format to have it sent to the configured
123 Note that these per-channel entries rooted at <..>/channels
[all …]
|
| /linux/Documentation/devicetree/bindings/display/ |
| H A D | sm501fb.txt | 7 - compatible : should be "smi,sm501".
8 - reg : contain two entries:
9 - First entry: System Configuration register
10 - Second entry: IO space (Display Controller register)
11 - interrupts : SMI interrupt to the cpu should be described here.
14 - mode : select a video mode:
15 <xres>x<yres>[-<bpp>][@<refresh>]
16 - edid : verbatim EDID data block describing attached display.
19 - little-endian: available on big endian systems, to
20 set different foreign endian.
[all …]
|
| /linux/arch/arm/include/asm/ |
| H A D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
134 * little byte 3 byte 2 byte 1 byte 0
137 * This means that reading a 32-bit word at address 0 returns the same
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|
| /linux/drivers/staging/rtl8723bs/include/ |
| H A D | basic_types.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
12 #define FAIL (-1)
16 #define FIELD_OFFSET(s, field) ((__kernel_ssize_t)&((s *)(0))->field)
22 /* TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness */
25 *Call endian free function when
38 /* Convert little data endian to host ordering */
79 (0xFFFFFFFF >> (32 - (__bitlen)))
81 (0xFFFF >> (16 - (__bitlen)))
83 (0xFF >> (8 - (__bitlen)))
[all …]
|
| /linux/arch/riscv/include/asm/ |
| H A D | image.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
36 * struct riscv_image_header - riscv kernel image header
39 * @text_offset: Image load offset (little endian)
40 * @image_size: Effective Image size (little endian)
41 * @flags: kernel flags (little endian)
45 * @magic: Magic number (RISC-V specific; deprecated)
|
| /linux/tools/testing/selftests/rseq/ |
| H A D | rseq-arm.h | 1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
3 * rseq-arm.h
5 * (C) Copyright 2016-2022 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
9 * - ARM little endian
12 * value 0x5de3. This traps if user-space reaches this instruction by mistake,
14 * pointer to attacker-controlled code on rseq abort.
23 * little endian:
27 * - ARMv6+ big endian (BE8):
29 * ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian
30 * code and big-endian data. The data value of the signature needs to have its
[all …]
|
| /linux/drivers/firewire/ |
| H A D | nosy-user.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
21 * quadlet with timestamp (microseconds, CPU endian)
22 * quadlet-padded packet data... (little endian)
23 * quadlet with ack (little endian)
|
| /linux/fs/minix/ |
| H A D | minix.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define INODE_VERSION(inode) minix_sb(inode->i_sb)->s_version
26 * minix super-block data in memory
84 return sb->s_fs_info; in minix_sb()
105 * big-endian 32 or 64 bit indexed bitmaps on big-endian system or
106 * little-endian bitmaps on little-endian system
123 * big-endian 16bit indexed bitmaps
136 if (--size == 0) in minix_find_first_zero_bit()
137 return (p - addr) << 4; in minix_find_first_zero_bit()
140 num = *--p; in minix_find_first_zero_bit()
[all …]
|
| /linux/arch/powerpc/include/asm/ |
| H A D | reg_8xx.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define SPRN_IC_DAT 562 /* Read-only data register */
16 #define SPRN_DC_DAT 570 /* Read-only data register */
70 #define DC_SLES 0x05000000 /* Set little endian swap mode */
71 #define DC_CLES 0x07000000 /* Clear little endian swap mode */
81 #define DC_LES 0x20000000 /* Caches are little endian mode */
|
| /linux/Documentation/devicetree/bindings/soc/fsl/ |
| H A D | guts.txt | 4 enabling, power-on-reset configuration monitoring, general-purpose
10 - compatible : Should define the compatible device type for
11 global-utilities.
13 "fsl,qoriq-device-config-1.0"
14 "fsl,qoriq-device-config-2.0"
15 "fsl,<chip>-device-config"
16 "fsl,<chip>-guts"
17 - reg : Offset and length of the register set for the device.
21 - fsl,has-rstcr : Indicates that the global utilities register set
25 - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
[all …]
|