168f5d3f3SJohannes Berg /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ 268f5d3f3SJohannes Berg /* 368f5d3f3SJohannes Berg * Copyright (C) 2021 Intel Corporation 468f5d3f3SJohannes Berg * Author: Johannes Berg <johannes@sipsolutions.net> 568f5d3f3SJohannes Berg */ 668f5d3f3SJohannes Berg #ifndef _UAPI_LINUX_VIRTIO_PCIDEV_H 768f5d3f3SJohannes Berg #define _UAPI_LINUX_VIRTIO_PCIDEV_H 868f5d3f3SJohannes Berg #include <linux/types.h> 968f5d3f3SJohannes Berg 1068f5d3f3SJohannes Berg /** 1168f5d3f3SJohannes Berg * enum virtio_pcidev_ops - virtual PCI device operations 12*6a241d29SJohannes Berg * @VIRTIO_PCIDEV_OP_RESERVED: reserved to catch errors 1368f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8; 1468f5d3f3SJohannes Berg * the @data field should be filled in by the device (in little endian). 1568f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8; 1668f5d3f3SJohannes Berg * the @data field contains the data to write (in little endian). 17*6a241d29SJohannes Berg * @VIRTIO_PCIDEV_OP_MMIO_READ: read BAR mem/pio, size can be variable; 1868f5d3f3SJohannes Berg * the @data field should be filled in by the device (in little endian). 19*6a241d29SJohannes Berg * @VIRTIO_PCIDEV_OP_MMIO_WRITE: write BAR mem/pio, size can be variable; 2068f5d3f3SJohannes Berg * the @data field contains the data to write (in little endian). 2168f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but 2268f5d3f3SJohannes Berg * the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE) 2368f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for 2468f5d3f3SJohannes Berg * the number 2568f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports 2668f5d3f3SJohannes Berg * the 16- or 32-bit write that would otherwise be done into memory, 2768f5d3f3SJohannes Berg * analogous to the write messages (@VIRTIO_PCIDEV_OP_MMIO_WRITE) above 2868f5d3f3SJohannes Berg * @VIRTIO_PCIDEV_OP_PME: Dummy message whose content is ignored (and should be 2968f5d3f3SJohannes Berg * all zeroes) to signal the PME# pin. 3068f5d3f3SJohannes Berg */ 3168f5d3f3SJohannes Berg enum virtio_pcidev_ops { 3268f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_RESERVED = 0, 3368f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_CFG_READ, 3468f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_CFG_WRITE, 3568f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_MMIO_READ, 3668f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_MMIO_WRITE, 3768f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_MMIO_MEMSET, 3868f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_INT, 3968f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_MSI, 4068f5d3f3SJohannes Berg VIRTIO_PCIDEV_OP_PME, 4168f5d3f3SJohannes Berg }; 4268f5d3f3SJohannes Berg 4368f5d3f3SJohannes Berg /** 4468f5d3f3SJohannes Berg * struct virtio_pcidev_msg - virtio PCI device operation 4568f5d3f3SJohannes Berg * @op: the operation to do 4668f5d3f3SJohannes Berg * @bar: the bar (only with BAR read/write messages) 4768f5d3f3SJohannes Berg * @reserved: reserved 4868f5d3f3SJohannes Berg * @size: the size of the read/write (in bytes) 4968f5d3f3SJohannes Berg * @addr: the address to read/write 5068f5d3f3SJohannes Berg * @data: the data, normally @size long, but just one byte for 5168f5d3f3SJohannes Berg * %VIRTIO_PCIDEV_OP_MMIO_MEMSET 5268f5d3f3SJohannes Berg * 5368f5d3f3SJohannes Berg * Note: the fields are all in native (CPU) endian, however, the 5468f5d3f3SJohannes Berg * @data values will often be in little endian (see the ops above.) 5568f5d3f3SJohannes Berg */ 5668f5d3f3SJohannes Berg struct virtio_pcidev_msg { 5768f5d3f3SJohannes Berg __u8 op; 5868f5d3f3SJohannes Berg __u8 bar; 5968f5d3f3SJohannes Berg __u16 reserved; 6068f5d3f3SJohannes Berg __u32 size; 6168f5d3f3SJohannes Berg __u64 addr; 6268f5d3f3SJohannes Berg __u8 data[]; 6368f5d3f3SJohannes Berg }; 6468f5d3f3SJohannes Berg 6568f5d3f3SJohannes Berg #endif /* _UAPI_LINUX_VIRTIO_PCIDEV_H */ 66