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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dintel,lgm-io.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rahul Tanwar <rahul.tanwar@linux.intel.com>
18 const: intel,lgm-io
25 '-pins$':
30 $ref: pinmux-node.yaml#
37 bias-pull-up: true
38 bias-pull-down: true
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/linux/drivers/pinctrl/
H A Dpinctrl-equilibrium.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pinctrl/pinconf-generic.h>
19 #include "pinctrl-equilibrium.h"
21 #define PIN_NAME_FMT "io-%d"
32 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
33 writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR); in eqbr_gpio_disable_irq()
34 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
45 gc->direction_input(gc, offset); in eqbr_gpio_enable_irq()
47 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_enable_irq()
48 writel(BIT(offset), gctrl->membase + GPIO_IRNRNSET); in eqbr_gpio_enable_irq()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
86 functionality. This driver supports the pinmux, push-pull and
117 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
141 The Awinic AW9523/AW9523B is a multi-function I2C GPIO
168 called pinctrl-cy8c95x0.
171 tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups"
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/linux/drivers/tty/serial/
H A Dlantiq.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/io.h>
144 u32 fstat = __raw_readl(port->membase + LTQ_ASC_FSTAT); in lqasc_tx_ready()
156 spin_lock_irqsave(&ltq_port->lock, flags); in lqasc_start_tx()
159 writeb(ch, port->membase + LTQ_ASC_TBUF)); in lqasc_start_tx()
160 spin_unlock_irqrestore(&ltq_port->lock, flags); in lqasc_start_tx()
167 __raw_writel(ASCWHBSTATE_CLRREN, port->membase + LTQ_ASC_WHBSTATE); in lqasc_stop_rx()
173 struct tty_port *tport = &port->state->port; in lqasc_rx_chars()
176 fifocnt = __raw_readl(port->membase + LTQ_ASC_FSTAT) & in lqasc_rx_chars()
178 while (fifocnt--) { in lqasc_rx_chars()
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/linux/drivers/spi/
H A Dspi-lantiq-ssc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2015 Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
4 * Copyright (C) 2016 Hauke Mehrtens <hauke@hauke-m.de>
12 #include <linux/io.h>
142 #define LTQ_SPI_RXCNT_TODO_M 0xFFFF /* Recevie to-do value */
191 return __raw_readl(spi->regbase + reg); in lantiq_ssc_readl()
197 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_writel()
203 u32 val = __raw_readl(spi->regbase + reg); in lantiq_ssc_maskl()
207 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_maskl()
212 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in tx_fifo_level()
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H A Dspi-cadence-quadspi.c1 // SPDX-License-Identifier: GPL-2.0-only
5 // Copyright Altera Corporation (C) 2012-2014. All rights reserved.
6 // Copyright Intel Corporation (C) 2019-2020. All rights reserved.
7 // Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
12 #include <linux/dma-mapping.h>
16 #include <linux/firmware/xlnx-zynqmp.h>
18 #include <linux/io.h>
30 #include <linux/spi/spi-mem.h>
33 #define CQSPI_NAME "cadence-qspi"
314 if (ret != -ETIMEDOUT) in cqspi_wait_for_bit()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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