xref: /linux/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
10434cd27SRahul Tanwar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
20434cd27SRahul Tanwar%YAML 1.2
30434cd27SRahul Tanwar---
44784adc6SLinus Walleij$id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#
50434cd27SRahul Tanwar$schema: http://devicetree.org/meta-schemas/core.yaml#
60434cd27SRahul Tanwar
784e85359SKrzysztof Kozlowskititle: Intel Lightning Mountain SoC pinmux & GPIO controller
80434cd27SRahul Tanwar
90434cd27SRahul Tanwarmaintainers:
100434cd27SRahul Tanwar  - Rahul Tanwar <rahul.tanwar@linux.intel.com>
110434cd27SRahul Tanwar
120434cd27SRahul Tanwardescription: |
130434cd27SRahul Tanwar  Pinmux & GPIO controller controls pin multiplexing & configuration including
140434cd27SRahul Tanwar  GPIO function selection & GPIO attributes configuration.
150434cd27SRahul Tanwar
160434cd27SRahul Tanwarproperties:
170434cd27SRahul Tanwar  compatible:
180434cd27SRahul Tanwar    const: intel,lgm-io
190434cd27SRahul Tanwar
200434cd27SRahul Tanwar  reg:
210434cd27SRahul Tanwar    maxItems: 1
220434cd27SRahul Tanwar
230434cd27SRahul Tanwar# Client device subnode's properties
240434cd27SRahul TanwarpatternProperties:
250434cd27SRahul Tanwar  '-pins$':
260434cd27SRahul Tanwar    type: object
270434cd27SRahul Tanwar    description:
280434cd27SRahul Tanwar      Pinctrl node's client devices use subnodes for desired pin configuration.
290434cd27SRahul Tanwar      Client device subnodes use below standard properties.
303d21a460SRob Herring    $ref: pinmux-node.yaml#
310434cd27SRahul Tanwar
320434cd27SRahul Tanwar    properties:
330434cd27SRahul Tanwar      function: true
344784adc6SLinus Walleij      groups: true
350434cd27SRahul Tanwar      pins: true
360434cd27SRahul Tanwar      pinmux: true
370434cd27SRahul Tanwar      bias-pull-up: true
380434cd27SRahul Tanwar      bias-pull-down: true
390434cd27SRahul Tanwar      drive-strength: true
400434cd27SRahul Tanwar      slew-rate: true
410434cd27SRahul Tanwar      drive-open-drain: true
420434cd27SRahul Tanwar      output-enable: true
430434cd27SRahul Tanwar
440434cd27SRahul Tanwar    required:
450434cd27SRahul Tanwar      - function
464784adc6SLinus Walleij      - groups
470434cd27SRahul Tanwar
480434cd27SRahul Tanwar    additionalProperties: false
490434cd27SRahul Tanwar
50c09acbc4SRafał MiłeckiallOf:
51*49cd1dd1SRob Herring  - $ref: pinctrl.yaml#
52c09acbc4SRafał Miłecki
530434cd27SRahul Tanwarrequired:
540434cd27SRahul Tanwar  - compatible
550434cd27SRahul Tanwar  - reg
560434cd27SRahul Tanwar
570434cd27SRahul TanwaradditionalProperties: false
580434cd27SRahul Tanwar
590434cd27SRahul Tanwarexamples:
600434cd27SRahul Tanwar  # Pinmux controller node
610434cd27SRahul Tanwar  - |
620434cd27SRahul Tanwar    pinctrl: pinctrl@e2880000 {
630434cd27SRahul Tanwar        compatible = "intel,lgm-io";
640434cd27SRahul Tanwar        reg = <0xe2880000 0x100000>;
650434cd27SRahul Tanwar
660434cd27SRahul Tanwar        uart0-pins {
670434cd27SRahul Tanwar             pins = <64>, /* UART_RX0 */
680434cd27SRahul Tanwar                    <65>; /* UART_TX0 */
690434cd27SRahul Tanwar             function = "CONSOLE_UART0";
700434cd27SRahul Tanwar             pinmux = <1>,
710434cd27SRahul Tanwar                      <1>;
720434cd27SRahul Tanwar             groups = "CONSOLE_UART0";
730434cd27SRahul Tanwar          };
740434cd27SRahul Tanwar    };
750434cd27SRahul Tanwar
760434cd27SRahul Tanwar...
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