Home
last modified time | relevance | path

Searched full:legal (Results 1 – 25 of 987) sorted by relevance

12345678910>>...40

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.h31 Legal, enumerator
44 /// sub-vectors where the operation is legal. For example a <8 x s64> add
50 /// rarely legal, but you might perform an <8 x i8> and then only look at
98 /// The result of a query. It either indicates a final answer of Legal or
100 /// more legal.
169 /// setAction ({G_ADD, 0, LLT::scalar(32)}, Legal);
175 /// LLT::scalar(32): {Legal, 0, LLT::scalar(32)}
203 /// setAction ({G_DIV, 0, LLT::scalar(32)}, Legal);
204 /// setAction ({G_DIV, 0, LLT::scalar(64)}, Legal);
207 /// will result in getAction({G_DIV, 0, T}) to return Legal for s32 and s64,
[all …]
H A DLegalizerInfo.h47 Legal, enumerator
60 /// sub-vectors where the operation is legal. For example a <8 x s64> add
69 /// rarely legal, but you might perform an <8 x i8> and then only look at
106 /// to decide whether a given operation is legal or not.
140 /// The result of a query. It either indicates a final answer of Legal or
142 /// more legal.
158 case LegacyLegalizeActions::Legal: in LegalizeActionStep()
159 Action = LegalizeActions::Legal; in LegalizeActionStep()
216 /// \returns true if this memory access is legal with for the access described
591 /// The instruction is legal if predicate is true.
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.cpp30 case Legal: in operator <<()
31 OS << "Legal"; in operator <<()
71 setScalarAction(TargetOpcode::G_ANYEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
72 setScalarAction(TargetOpcode::G_ZEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
73 setScalarAction(TargetOpcode::G_SEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
74 setScalarAction(TargetOpcode::G_TRUNC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
75 setScalarAction(TargetOpcode::G_TRUNC, 1, {{1, Legal}}); in LegacyLegalizerInfo()
77 setScalarAction(TargetOpcode::G_INTRINSIC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
78 setScalarAction(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS, 0, {{1, Legal}}); in LegacyLegalizerInfo()
79 setScalarAction(TargetOpcode::G_INTRINSIC_CONVERGENT, 0, {{1, Legal}}); in LegacyLegalizerInfo()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp118 setOperationAction(ISD::ADD, MVT::i32, Legal); in ARCTargetLowering()
119 setOperationAction(ISD::SUB, MVT::i32, Legal); in ARCTargetLowering()
120 setOperationAction(ISD::AND, MVT::i32, Legal); in ARCTargetLowering()
121 setOperationAction(ISD::SMAX, MVT::i32, Legal); in ARCTargetLowering()
122 setOperationAction(ISD::SMIN, MVT::i32, Legal); in ARCTargetLowering()
124 setOperationAction(ISD::ADDC, MVT::i32, Legal); in ARCTargetLowering()
125 setOperationAction(ISD::ADDE, MVT::i32, Legal); in ARCTargetLowering()
126 setOperationAction(ISD::SUBC, MVT::i32, Legal); in ARCTargetLowering()
127 setOperationAction(ISD::SUBE, MVT::i32, Legal); in ARCTargetLowering()
130 setOperationAction(ISD::SHL, MVT::i32, Legal); in ARCTargetLowering()
[all …]
/freebsd/targets/pseudo/userland/share/
H A DMakefile.depend10 share/doc/legal/intel_ipw \
11 share/doc/legal/intel_iwi \
12 share/doc/legal/intel_iwn \
13 share/doc/legal/intel_wpi \
14 share/doc/legal/realtek \
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DTargetSelect.h55 /// It is legal for a client to make multiple calls to this function.
65 /// It is legal for a client to make multiple calls to this function.
78 /// It is legal for a client to make multiple calls to this function.
88 /// It is legal for a client to make multiple calls to this function.
98 /// It is legal for a client to make multiple calls to this function.
108 /// It is legal for a client to make multiple calls to this function.
118 /// It is legal for a client to make multiple calls to this function.
/freebsd/share/man/man4/
H A Dipwfw.460 .Pa /usr/share/doc/legal/intel_ipw.LICENSE
64 .Dl "legal.intel_ipw.license_ack=1"
66 .Bl -tag -width ".Pa /usr/share/doc/legal/intel_ipw.LICENSE" -compact
67 .It Pa /usr/share/doc/legal/intel_ipw.LICENSE
H A Dipw.458 legal.intel_ipw.license_ack=1
76 .Pa /usr/share/doc/legal/intel_ipw.LICENSE
80 .Dl "legal.intel_ipw.license_ack=1"
90 .Bl -tag -width "/usr/share/doc/legal/intel_ipw.LICENSE" -compact
91 .It Pa /usr/share/doc/legal/intel_ipw.LICENSE
H A Diwifw.460 .Pa /usr/share/doc/legal/intel_iwi.LICENSE
64 .Dl "legal.intel_iwi.license_ack=1"
66 .Bl -tag -width ".Pa /usr/share/doc/legal/intel_iwi.LICENSE" -compact
67 .It Pa /usr/share/doc/legal/intel_iwi.LICENSE
H A Diwi.458 legal.intel_iwi.license_ack=1
76 .Pa /usr/share/doc/legal/intel_iwi.LICENSE
80 .Dl "legal.intel_iwi.license_ack=1"
98 .Bl -tag -width "/usr/share/doc/legal/intel_iwi.LICENSE" -compact
99 .It Pa /usr/share/doc/legal/intel_iwi.LICENSE
H A Drtwnfw.479 .Pa /usr/share/doc/legal/realtek.LICENSE
83 .Dl "legal.realtek.license_ack=1"
85 .Bl -tag -width ".Pa /usr/share/doc/legal/realtek.LICENSE" -compact
86 .It Pa /usr/share/doc/legal/realtek.LICENSE
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp94 setOperationAction(ISD::ADD, VecTy, Legal); in MipsSETargetLowering()
95 setOperationAction(ISD::SUB, VecTy, Legal); in MipsSETargetLowering()
96 setOperationAction(ISD::LOAD, VecTy, Legal); in MipsSETargetLowering()
97 setOperationAction(ISD::STORE, VecTy, Legal); in MipsSETargetLowering()
98 setOperationAction(ISD::BITCAST, VecTy, Legal); in MipsSETargetLowering()
105 setOperationAction(ISD::ADDC, MVT::i32, Legal); in MipsSETargetLowering()
106 setOperationAction(ISD::ADDE, MVT::i32, Legal); in MipsSETargetLowering()
111 setOperationAction(ISD::MUL, MVT::v2i16, Legal); in MipsSETargetLowering()
181 setOperationAction(ISD::MUL, MVT::i64, Legal); in MipsSETargetLowering()
201 setOperationAction(ISD::LOAD, MVT::i32, Legal); in MipsSETargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Support/BLAKE3/
H A DLICENSE6 Creative Commons Legal Code
11 LEGAL SERVICES. DISTRIBUTION OF THIS DOCUMENT DOES NOT CREATE AN
43 Work and the meaning and intended legal effect of CC0 on those rights.
60 European Parliament and of the Council of 11 March 1996 on the legal
81 revocation, rescission, cancellation, termination, or any other legal or
144 "Legal Entity" shall mean the union of the acting entity and all
152 "You" (or "Your") shall mean an individual or Legal Entity
181 or by an individual or Legal Entity authorized to submit on behalf of
191 "Contributor" shall mean Licensor and any individual or Legal Entity
282 8. Limitation of Liability. In no event and under no legal theory,
/freebsd/contrib/netbsd-tests/lib/libc/locale/
H A Dt_mbtowc.c72 h_mbtowc(const char *locale, const char *illegal, const char *legal) in h_mbtowc() argument
116 (void)strvis(buf, legal, VIS_WHITE | VIS_OCTAL); in h_mbtowc()
117 (void)printf("Checking legal sequence: \"%s\"\n", buf); in h_mbtowc()
120 ret = mbtowc(NULL, legal, strlen(legal)); in h_mbtowc()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp178 setOperationAction(ISD::ABS, VT, Legal); in SystemZTargetLowering()
228 // default to Expand, so need to be modified to Legal where appropriate. in SystemZTargetLowering()
229 setOperationAction(ISD::STRICT_FP_TO_SINT, VT, Legal); in SystemZTargetLowering()
231 setOperationAction(ISD::STRICT_FP_TO_UINT, VT, Legal); in SystemZTargetLowering()
234 setOperationAction(ISD::STRICT_SINT_TO_FP, VT, Legal); in SystemZTargetLowering()
236 setOperationAction(ISD::STRICT_UINT_TO_FP, VT, Legal); in SystemZTargetLowering()
240 // Handle i128 if legal. in SystemZTargetLowering()
294 // Whether or not i128 is not a legal type, we need to custom lower in SystemZTargetLowering()
301 // Mark sign/zero extending atomic loads as legal, which will make in SystemZTargetLowering()
304 {MVT::i8, MVT::i16, MVT::i32}, Legal); in SystemZTargetLowering()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h200 Legal, // The target natively supports this operation. enumerator
207 /// This enum indicates whether a types are legal for a target, and if not,
277 OnlyLegalOrCustom, // Only expand when the resulting instructions are legal
399 /// type. Targets should return a legal type if the input type is legal.
424 /// ISD::VP_ADD, ISD::VP_SUB, etc. It must be a legal scalar integer type,
529 // the constraint that all of the necessary shuffles are legal (as determined
761 /// integer values of the given size. Assume that any legal integer type can
1044 /// The 'representative' register class is the largest legal super-reg
1111 /// legal (return 'Legal') or we need to promote it to a larger type (return
1124 /// legal (return 'Legal') or we need to promote it to a larger type (return
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorizationPlanner.h315 LoopVectorizationLegality *Legal; variable
350 const TargetTransformInfo &TTI, LoopVectorizationLegality *Legal, in LoopVectorizationPlanner() argument
354 : OrigLoop(L), LI(LI), DT(DT), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM), in LoopVectorizationPlanner()
416 /// according to the information gathered by Legal when it checked if it is
417 /// legal to vectorize the loop.
421 /// Build a VPlan according to the information gathered by Legal. \return a
427 /// Legal. This method is only used for the legacy inner loop vectorizer.
435 /// according to the information gathered by Legal when it checked if it is
436 /// legal to vectorize the loop. This method creates VPlans using VPRecipes.
/freebsd/contrib/llvm-project/clang/include/clang/CodeGen/
H A DSwiftCallingConv.h96 /// The component types will always be legal vector, floating-point,
133 /// Is the given integer type "legal" for Swift's perspective on the
137 /// Is the given vector type "legal" for Swift's perspective on the
144 /// Minimally split a legal vector type.
149 /// Turn a vector type in a sequence of legal component vector types.
/freebsd/sys/kern/
H A Dsubr_scanf.c70 #define SIGNOK 0x40 /* +/- is (still) legal */
73 #define DPTOK 0x100 /* (float) decimal point is still legal */
74 #define EXPOK 0x200 /* (float) exponent (e+3, etc) still legal */
76 #define PFXOK 0x100 /* 0x prefix is (still) legal */
432 * The digit 0 is always legal, but is in vsscanf()
454 /* 1 through 7 always legal */ in vsscanf()
465 break; /* not legal here */ in vsscanf()
476 break; /* not legal here */ in vsscanf()
499 * If we got here, c is not a legal character in vsscanf()
505 * c is legal: store it and look at the next. in vsscanf()
/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Vectorize/
H A DLoopVectorizationLegality.h227 /// LoopVectorizationLegality checks if it is legal to vectorize a loop, and
264 /// Returns true if it is legal to vectorize this loop.
266 /// loop, only that it is legal to do so.
273 /// Returns true if it is legal to vectorize the FP math operations in this
274 /// loop. Vectorizing is legal if we allow reordering of FP operations, or if
409 /// its nested loops are considered legal for vectorization. These legal
423 /// (non-recursive) are considered legal for vectorization.
437 /// legal to vectorize the code, considering only memory constrains.
451 /// \p SafePtrs is a list of addresses that are known to be legal and we know
/freebsd/contrib/llvm-project/libcxx/src/
H A Dstrstream.cpp241 bool legal = false; seekoff() local
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/modes/
H A DTHIRDPARTYLICENSE.openssl16 "Legal Entity" shall mean the union of the acting entity and all
24 "You" (or "Your") shall mean an individual or Legal Entity
53 or by an individual or Legal Entity authorized to submit on behalf of
63 "Contributor" shall mean Licensor and any individual or Legal Entity
154 8. Limitation of Liability. In no event and under no legal theory,
/freebsd/crypto/openssl/
H A DLICENSE.txt16 "Legal Entity" shall mean the union of the acting entity and all
24 "You" (or "Your") shall mean an individual or Legal Entity
53 or by an individual or Legal Entity authorized to submit on behalf of
63 "Contributor" shall mean Licensor and any individual or Legal Entity
154 8. Limitation of Liability. In no event and under no legal theory,
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1065 // Treat all other vector types as legal. in LowerSETCC()
1502 // All operations default to "legal", except: in HexagonTargetLowering()
1511 setOperationAction(ISD::ConstantFP, MVT::f32, Legal); in HexagonTargetLowering()
1512 setOperationAction(ISD::ConstantFP, MVT::f64, Legal); in HexagonTargetLowering()
1513 setOperationAction(ISD::TRAP, MVT::Other, Legal); in HexagonTargetLowering()
1561 setOperationAction(LegalIntOp, MVT::i32, Legal); in HexagonTargetLowering()
1562 setOperationAction(LegalIntOp, MVT::i64, Legal); in HexagonTargetLowering()
1587 setOperationAction(ISD::CTPOP, MVT::i64, Legal); in HexagonTargetLowering()
1589 setOperationAction(ISD::BITREVERSE, MVT::i32, Legal); in HexagonTargetLowering()
1590 setOperationAction(ISD::BITREVERSE, MVT::i64, Legal); in HexagonTargetLowering()
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp492 // Conversion to/from FP16/FP16x2 is always legal. in NVPTXTargetLowering()
498 setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Legal); in NVPTXTargetLowering()
500 setOperationAction(ISD::READSTEADYCOUNTER, MVT::i64, Legal); in NVPTXTargetLowering()
502 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); in NVPTXTargetLowering()
503 setFP16OperationAction(ISD::SETCC, MVT::v2f16, Legal, Expand); in NVPTXTargetLowering()
505 // Conversion to/from BFP16/BFP16x2 is always legal. in NVPTXTargetLowering()
511 setBF16OperationAction(ISD::SETCC, MVT::v2bf16, Legal, Expand); in NVPTXTargetLowering()
512 setBF16OperationAction(ISD::SETCC, MVT::bf16, Legal, Promote); in NVPTXTargetLowering()
516 // Conversion to/from i16/i16x2 is always legal. in NVPTXTargetLowering()
556 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i64, Legal); in NVPTXTargetLowering()
[all …]

12345678910>>...40