Lines Matching full:legal

1065   // Treat all other vector types as legal.
1502   // All operations default to "legal", except:
1511   setOperationAction(ISD::ConstantFP,           MVT::f32,   Legal);
1512   setOperationAction(ISD::ConstantFP,           MVT::f64,   Legal);
1513   setOperationAction(ISD::TRAP,                 MVT::Other, Legal);
1561     setOperationAction(LegalIntOp, MVT::i32, Legal);
1562     setOperationAction(LegalIntOp, MVT::i64, Legal);
1587   setOperationAction(ISD::CTPOP, MVT::i64, Legal);
1589   setOperationAction(ISD::BITREVERSE, MVT::i32, Legal);
1590   setOperationAction(ISD::BITREVERSE, MVT::i64, Legal);
1591   setOperationAction(ISD::BSWAP, MVT::i32, Legal);
1592   setOperationAction(ISD::BSWAP, MVT::i64, Legal);
1594   setOperationAction(ISD::FSHL, MVT::i32, Legal);
1595   setOperationAction(ISD::FSHL, MVT::i64, Legal);
1596   setOperationAction(ISD::FSHR, MVT::i32, Legal);
1597   setOperationAction(ISD::FSHR, MVT::i64, Legal);
1643   // either "custom" or "legal" for specific cases.
1695   // are legal.
1696   setLoadExtAction(ISD::EXTLOAD,  MVT::v2i16, MVT::v2i8, Legal);
1697   setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i16, MVT::v2i8, Legal);
1698   setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, MVT::v2i8, Legal);
1699   setLoadExtAction(ISD::EXTLOAD,  MVT::v4i16, MVT::v4i8, Legal);
1700   setLoadExtAction(ISD::ZEXTLOAD, MVT::v4i16, MVT::v4i8, Legal);
1701   setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, MVT::v4i8, Legal);
1703   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i8,  Legal);
1704   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Legal);
1705   setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i32, Legal);
1717     setOperationAction(ISD::ADD, NativeVT, Legal);
1718     setOperationAction(ISD::SUB, NativeVT, Legal);
1719     setOperationAction(ISD::MUL, NativeVT, Legal);
1720     setOperationAction(ISD::AND, NativeVT, Legal);
1721     setOperationAction(ISD::OR,  NativeVT, Legal);
1722     setOperationAction(ISD::XOR, NativeVT, Legal);
1725       setOperationAction(ISD::SPLAT_VECTOR, NativeVT, Legal);
1726       setOperationAction(ISD::BSWAP,        NativeVT, Legal);
1727       setOperationAction(ISD::BITREVERSE,   NativeVT, Legal);
1732     setOperationAction(ISD::SMIN, VT, Legal);
1733     setOperationAction(ISD::SMAX, VT, Legal);
1734     setOperationAction(ISD::UMIN, VT, Legal);
1735     setOperationAction(ISD::UMAX, VT, Legal);
1790   setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
1791   setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
1822     setIndexedLoadAction(ISD::POST_INC, VT, Legal);
1823     setIndexedStoreAction(ISD::POST_INC, VT, Legal);
1829     setOperationAction(ISD::ROTL, MVT::i32, Legal);
1830     setOperationAction(ISD::ROTL, MVT::i64, Legal);
1831     setOperationAction(ISD::ROTR, MVT::i32, Legal);
1832     setOperationAction(ISD::ROTR, MVT::i64, Legal);
1835     setOperationAction(ISD::FADD, MVT::f64, Legal);
1836     setOperationAction(ISD::FSUB, MVT::f64, Legal);
1839     setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
1840     setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
1841     setOperationAction(ISD::FMUL,    MVT::f64, Legal);
2237   return TargetLoweringBase::Legal;
2262          "HVX shuffles should be legal");
2727   // Special case for v{8,4,2}i1 (the only boolean vectors legal in Hexagon
3184   // smaller legal loads, do the default (target-independent) expansion.
3358         errs() << "Error: check for a non-legal type in this operation\n";
3668 /// AM is legal for this target, for a load/store of the specified type.
3706 /// legal.  It is frequently not legal in PIC relocation models.
3712 /// isLegalICmpImmediate - Return true if the specified immediate is legal