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/linux/Documentation/devicetree/bindings/display/
H A Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
25 In version 3 of the controller, each layer has fixed memory offset and address
32 - xylon,logicvc-3.02.a-display
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/linux/drivers/gpu/drm/logicvc/
H A Dlogicvc_layer.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
52 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
57 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
62 .colorspace = LOGICVC_LAYER_COLORSPACE_RGB,
86 struct drm_device *drm_dev = drm_plane->dev; in logicvc_plane_atomic_check()
87 struct logicvc_layer *layer = logicvc_layer(drm_plane); in logicvc_plane_atomic_check() local
96 if (!new_state->crt in logicvc_plane_atomic_check()
140 struct logicvc_layer *layer = logicvc_layer(drm_plane); logicvc_plane_atomic_update() local
237 struct logicvc_layer *layer = logicvc_layer(drm_plane); logicvc_plane_atomic_disable() local
260 logicvc_layer_buffer_find_setup(struct logicvc_drm * logicvc,struct logicvc_layer * layer,struct drm_plane_state * state,struct logicvc_layer_buffer_setup * setup) logicvc_layer_buffer_find_setup() argument
353 logicvc_layer_formats_lookup(struct logicvc_layer * layer) logicvc_layer_formats_lookup() argument
383 logicvc_layer_config_parse(struct logicvc_drm * logicvc,struct logicvc_layer * layer) logicvc_layer_config_parse() argument
435 struct logicvc_layer *layer; logicvc_layer_get_from_index() local
447 struct logicvc_layer *layer; logicvc_layer_get_from_type() local
466 struct logicvc_layer *layer = NULL; logicvc_layer_init() local
558 logicvc_layer_fini(struct logicvc_drm * logicvc,struct logicvc_layer * layer) logicvc_layer_fini() argument
569 struct logicvc_layer *layer; logicvc_layers_attach_crtc() local
586 struct logicvc_layer *layer; logicvc_layers_init() local
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H A Dlogicvc_of.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-2022 Bootlin
14 { "lvds-4bits", LOGICVC_DISPLAY_INTERFACE_LVDS_4BITS },
15 { "lvds-3bits", LOGICVC_DISPLAY_INTERFACE_LVDS_3BITS },
33 { "layer", LOGICVC_LAYER_ALPHA_LAYER },
40 .name = "xylon,display-interface",
48 .name = "xylon,display-colorspace",
56 .name = "xylon,display-depth",
60 .name = "xylon,row-stride",
67 .name = "xylon,background-layer",
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H A Dlogicvc_layer.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2019-2022 Bootlin
27 u32 colorspace; member
36 u32 colorspace; member
53 struct logicvc_layer *layer,
/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_disp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 #include <linux/dma-mapping.h>
21 #include <linux/media-bus-format.h>
34 * --------
39 * +------------------------------------------------------------+
40 * +--------+ | +----------------+ +-----------+ |
41 * | DPDMA | --->| | --> | Video | Video +-------------+ |
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/linux/Documentation/devicetree/bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
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/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
45 /* Trigger Source Select - ASIC-defendant, actual values for the
74 /* Trigger Source Select - ASIC-dependant, actual values for the
188 /* disabling trigger-reset */
206 /* Combine with below and move YUV/RGB color conversion to SW layer */
210 /* Combine with above and move YUV/RGB color conversion to SW layer */
215 enum dc_color_space colorspace,
217 /*************** End-of-move ********************/
223 * because this is not DP-specific (which is probably somewhere in DP
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
32 * SSPP sub-blocks/features
34 …* @DPU_SSPP_SCALER_QSEED3_COMPATIBLE, QSEED3-compatible alogorithm support (includes QSEED3, QSEE…
37 * @DPU_SSPP_CSC_10BIT, Support of 10-bit Color space conversion
38 * @DPU_SSPP_CURSOR, SSPP can be used as a cursor layer
68 * MIXER sub-blocks/features
69 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
78 * DSPP sub-blocks
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddpp.h2 * Copyright 2012-15 Advanced Micro Devices, Inc.
36 * or a layer to be blended with other DPP, or a rectangle associated with a
40 * - graphic color keyer
41 * - graphic cursor compositing
42 * - graphic or video image source to destination scaling
43 * - image sharping
44 * - video format conversion from 4:2:0 or 4:2:2 to 4:4:4
45 * - Color Space Conversion
46 * - Host LUT gamma adjustment
47 * - Colo
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/linux/Documentation/userspace-api/media/v4l/
H A Dhist-v4l2.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _hist-v4l2:
21 1998-08-20: First version.
23 1998-08-27: The :c:func:`select()` function was introduced.
25 1998-09-10: New video standard interface.
27 1998-09-18: The ``VIDIOC_NONCAP`` ioctl was replaced by the otherwise
36 1998-09-28: Revamped video standard. Made video controls individually
39 1998-10-02: The ``id`` field was removed from
47 1998-11-08: Many minor changes. Most symbols have been renamed. Some
50 1998-11-12: The read/write direction of some ioctls was misdefined.
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H A Dext-ctrls-codec-stateless.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _codec-stateless-controls:
19 .. _codec-stateless-control-id:
24 .. _v4l2-codec-stateless-h264:
44 .. flat-table:: struct v4l2_ctrl_h264_sps
45 :header-rows: 0
46 :stub-columns: 0
49 * - __u8
50 - ``profile_idc``
51 -
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/linux/drivers/media/i2c/
H A Dtvp514x.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Karicheri Muralidharan <m-karicheri2@ti.com>
26 #include <linux/v4l2-mediabus.h>
30 #include <media/media-entity.h>
31 #include <media/v4l2-async.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-ctrls.h>
34 #include <media/v4l2-device.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-mediabus.h>
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/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifie
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/linux/drivers/media/platform/ti/omap3isp/
H A Dispccp2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * TI OMAP3 ISP - CCP2 module
62 * ccp2_print_status - Print current CCP2 module register values.
65 dev_dbg(isp->dev, "###CCP2 " #name "=0x%08x\n", \
72 dev_dbg(isp->dev, "-------------CCP2 Register dump-------------\n"); in ccp2_print_status()
103 dev_dbg(isp->dev, "--------------------------------------------\n"); in ccp2_print_status()
107 * ccp2_reset - Reset the CCP2
122 dev_warn(isp->dev, in ccp2_reset()
130 * ccp2_pwr_cfg - Configure the power mode settings
138 ((isp->revision == ISP_REVISION_15_0 && isp->autoidle) ? in ccp2_pwr_cfg()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c1 // SPDX-License-Identifier: MIT
29 #include <media/cec-notifier.h>
68 /* parse_write_buffer_into_params - Helper function to parse debugfs write buffer into an array
95 return -EFAULT; in parse_write_buffer_into_params()
109 /* skip non-space*/ in parse_write_buffer_into_params()
158 * debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
160 * --- t
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H A Damdgpu_dm.c1 // SPDX-License-Identifier: MIT
99 #include <media/cec-notifier.h>
181 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type()
200 struct dc_link *link = aconnector->dc_link; in update_subconnector_property()
201 struct drm_connector *connector = &aconnector->base; in update_subconnector_property()
204 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in update_subconnector_property()
207 if (aconnector->dc_sink) in update_subconnector_property()
210 drm_object_property_set_value(&connector->base, in update_subconnector_property()
211 connector->dev->mode_config.dp_subconnector_property, in update_subconnector_property()
259 * struct amdgpu_device *adev - [in] desired amdgpu device
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/linux/drivers/gpu/drm/
H A Ddrm_atomic.c4 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
60 * drm_crtc_commit_wait - Waits for a commit to complete
77 ret = wait_for_completion_timeout(&commit->hw_done, timeout); in drm_crtc_commit_wait()
79 drm_err(commit->crtc->dev, "hw_done timed out\n"); in drm_crtc_commit_wait()
80 return -ETIMEDOUT; in drm_crtc_commit_wait()
87 ret = wait_for_completion_timeout(&commit->flip_done, timeout); in drm_crtc_commit_wait()
89 drm_err(commit->crtc->dev, "flip_done timed out\n"); in drm_crtc_commit_wait()
90 return -ETIMEDOUT; in drm_crtc_commit_wait()
98 * drm_atomic_state_default_release -
108 kfree(state->connectors); in drm_atomic_state_default_release()
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