Searched +full:keystone +full:- +full:wdt (Results 1 – 16 of 16) sorted by relevance
/linux/Documentation/devicetree/bindings/power/reset/ |
H A D | keystone-reset.txt | 1 * Device tree bindings for Texas Instruments keystone reset 6 The Keystone SoCs can contain up to 4 watchdog timers to reset 14 - compatible: ti,keystone-reset 16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to 20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to 26 - ti,soft-reset: Boolean option indicating soft reset. 29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related 30 to WDT driver, it's just needed to enable a SoC related 33 begins from 0 to 3, as keystone can contain up to 4 SoC 37 Setup keystone reset so that in case software reset or [all …]
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/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | ti,davinci-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/ti,davinci-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI DaVinci/Keystone Watchdog Timer Controller 10 - Kousik Sanagavarapu <five231003@gmail.com> 13 TI's Watchdog Timer Controller for DaVinci and Keystone Processors. 17 Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf 18 Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf 21 - $ref: watchdog.yaml# [all …]
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/linux/arch/arm/boot/dts/ti/keystone/ |
H A D | keystone.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/gpio/gpio.h> 10 compatible = "ti,keystone"; 11 model = "Texas Instruments Keystone 2 SoC"; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&gic>; 30 gic: interrupt-controller@2561000 { [all …]
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H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 13 compatible = "ti,k2g","ti,keystone"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; [all …]
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/linux/drivers/power/reset/ |
H A D | keystone-reset.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI keystone reboot driver 41 * rsctrl_enable_rspll_write - enable access to RSCTRL, RSCFG 70 {.compatible = "ti,keystone-reset", }, 83 struct device *dev = &pdev->dev; in rsctrl_probe() 84 struct device_node *np = dev->of_node; in rsctrl_probe() 87 return -ENODEV; in rsctrl_probe() 90 pllctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pll"); in rsctrl_probe() 94 devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-dev"); in rsctrl_probe() 98 ret = of_property_read_u32_index(np, "ti,syscon-pll", 1, &rspll_offset); in rsctrl_probe() [all …]
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/linux/drivers/watchdog/ |
H A D | davinci_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0 7 * Copyright (C) 2006-2013 Texas Instruments. 24 #define MODULE_NAME "DAVINCI-WDT: " 59 * struct to hold data for each WDT device 60 * @base - base io address of WD device 61 * @clk - source clock of WDT 62 * @wdd - hold watchdog device as is in WDT core 77 wdt_freq = clk_get_rate(davinci_wdt->clk); in davinci_wdt_start() 80 iowrite32(0, davinci_wdt->base + TCR); in davinci_wdt_start() 81 /* reset timer, set mode to 64-bit watchdog, and unreset */ in davinci_wdt_start() [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 16 on-line as fast as possible after a lock-up. There's both a watchdog 21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source. 51 bool "Update boot-enabled watchdog until userspace takes over" 77 bool "Enable watchdog hrtimer-based pretimeouts" 198 tristate "ChromeOS EC-based watchdog" 252 tristate "Watchdog device controlled through GPIO-line" 257 controlled through GPIO-line. 280 will be called lenovo-se10-wdt. 394 module will be called mlx-wdt. [all …]
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/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 19 compatible = "ti,j721e-esm"; 21 bootph-pre-ram; 23 ti,esm-pins = <0>, <1>, <2>, <85>; 32 compatible = "ti,am654-timer"; [all …]
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H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
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H A D | k3-am62p-j722s-common-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 15 pinctrl-single,gpio-range = 19 bootph-all; 21 mcu_pmx_range: gpio-range { 22 #pinctrl-single,gpio-range-cells = <3>; [all …]
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H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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H A D | k3-am62p-j722s-common-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 gic500: interrupt-controller@1800000 { 16 compatible = "arm,gic-v3"; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 #interrupt-cells = <3>; [all …]
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H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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H A D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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