/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | gpio-davinci.txt | 1 Davinci/Keystone GPIO controller bindings 4 - compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs 5 "ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L, 7 "ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G 8 "ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654 9 "ti,j721e-gpio", "ti,keystone-gpio": for J721E SoCs 10 "ti,am64-gpio", "ti,keystone-gpio": for AM64 SoCs 12 - reg: Physical base address of the controller and the size of memory mapped 15 - gpio-controller : Marks the device node as a gpio controller. 17 - #gpio-cells : Should be two. [all …]
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H A D | gpio-dsp-keystone.txt | 1 Keystone 2 DSP GPIO controller bindings 4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core. 5 This is one of the component used by the IPC mechanism used on Keystone SOCs. 7 For example TCI6638K2K SoC has 8 DSP GPIO controllers: 8 - 8 for C66x CorePacx CPUs 0-7 10 Keystone 2 DSP GPIO controller has specific features: 11 - each GPIO can be configured only as output pin; 12 - setting GPIO value to 1 causes IRQ generation on target DSP core; 13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still 17 - compatible: should be "ti,keystone-dsp-gpio" [all …]
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H A D | gpio-davinci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-davinci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GPIO controller for Davinci and keystone devices 10 - Keerthy <j-keerthy@ti.com> 15 - items: 16 - enum: 17 - ti,k2g-gpio 18 - ti,am654-gpio [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
H A D | keystone-k2hk.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Kepler/Hawking soc specific device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2hk", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Kepler/Hawking SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2g.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/keystone.h> 10 #include <dt-bindings/gpio/gpio.h> 13 compatible = "ti,k2g","ti,keystone"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 32 #address-cells = <1>; [all …]
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H A D | keystone.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/gpio/gpio.h> 10 compatible = "ti,keystone"; 11 model = "Texas Instruments Keystone 2 SoC"; 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&gic>; 30 gic: interrupt-controller@2561000 { [all …]
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H A D | keystone-k2l.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Lamarr SoC specific device tree 5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2l", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Lamarr SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2e.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Edison soc device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/reset/ti-syscon.h> 11 compatible = "ti,k2e", "ti,keystone"; 12 model = "Texas Instruments Keystone 2 Edison SoC"; 15 #address-cells = <1>; 16 #size-cells = <0>; 18 interrupt-parent = <&gic>; 21 compatible = "arm,cortex-a15"; [all …]
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H A D | keystone-k2hk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Keystone 2 Kepler/Hawking EVM device tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 9 #include "keystone.dtsi" 10 #include "keystone-k2hk.dtsi" 13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"; 14 model = "Texas Instruments Keystone 2 Kepler/Hawking EVM"; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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H A D | keystone-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree Source for Keystone 2 clock tree 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 #address-cells = <1>; 10 #size-cells = <1>; 14 #clock-cells = <0>; 15 compatible = "ti,keystone,pll-mux-clock"; 18 bit-shift = <23>; 19 bit-mask = <1>; 20 clock-output-names = "mainmuxclk"; [all …]
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H A D | keystone-k2g-ice.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 7 /dts-v1/; 9 #include "keystone-k2g.dtsi" 10 #include <dt-bindings/net/ti-dp83867.h> 13 compatible = "ti,k2g-ice", "ti,k2g", "ti,keystone"; 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; 26 dsp_common_memory: dsp-common-memory@81f800000 { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | ti,keystone-rproc.txt | 1 TI Keystone DSP devices 4 The TI Keystone 2 family of SoCs usually have one or more (upto 8) TI DSP Core 5 sub-systems that are used to offload some of the processor-intensive tasks or 8 These processor sub-systems usually contain additional sub-modules like L1 11 Keystone 2 SoCs is usually a TMS320C66x CorePac processor. 15 Each DSP Core sub-system is represented as a single DT node, and should also 22 -------------------- 25 - compatible: Should be one of the following, 26 "ti,k2hk-dsp" for DSPs on Keystone 2 66AK2H/K SoCs 27 "ti,k2l-dsp" for DSPs on Keystone 2 66AK2L SoCs [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf 5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf 6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 9 - #address-cells: number of cells required to define a chip select 11 - #size-cells: should be zero. 12 - compatible: 13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family 14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family 15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC 17 - reg: Offset and length of SPI controller register space [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am65-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,am654-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am64-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,am654-timer"; 18 clock-names = "fck"; 19 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>; 20 ti,timer-pwm; 25 compatible = "ti,am654-timer"; 28 clock-names = "fck"; 29 power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; 30 ti,timer-pwm; [all …]
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H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-width = <32>; 15 pinctrl-single,function-mask = <0xffffffff>; 19 bootph-pre-ram; 20 compatible = "ti,j721e-esm"; 23 ti,esm-pins = <0>, <1>, <2>, <85>; [all …]
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H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 19 compatible = "ti,j721e-esm"; 21 bootph-pre-ram; 23 ti,esm-pins = <0>, <1>, <2>, <85>; 32 compatible = "ti,am654-timer"; [all …]
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H A D | k3-am62p-j722s-common-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-single,function-mask = <0xffffffff>; 15 pinctrl-single,gpio-range = 19 bootph-all; 21 mcu_pmx_range: gpio-range { 22 #pinctrl-single,gpio-range-cells = <3>; [all …]
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H A D | k3-am62p-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 4 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "pinctrl-single"; 11 #pinctrl-cells = <1>; 12 pinctrl-single,register-width = <32>; 13 pinctrl-single,function-mask = <0xffffffff>; 14 bootph-all; 18 compatible = "ti,j721e-esm"; 20 ti,esm-pins = <0>, <1>, <2>, <85>; 22 bootph-pre-ram; [all …]
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H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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H A D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | ti,sci-intr.txt | 10 +----------------------+ 12 +-------+ | +------+ +-----+ | 13 | GPIO |----------->| | irq0 | | 0 | | Host IRQ 14 +-------+ | +------+ +-----+ | controller 15 | . . | +-------+ 16 +-------+ | . . |----->| IRQ | 17 | INTA |----------->| . . | +-------+ 18 +-------+ | . +-----+ | 19 | +------+ | N | | 20 | | irqM | +-----+ | [all …]
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H A D | ti,sci-intr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lokesh Vutla <lokeshvutla@ti.com> 13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# 22 +----------------------+ 24 +-------+ | +------+ +-----+ | 25 | GPIO |----------->| | irq0 | | 0 | | Host IRQ 26 +-------+ | +------+ +-----+ | controller [all …]
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