Searched +full:jh8100 +full:- +full:starlink +full:- +full:pmu (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | starfive,jh8100-starlink-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/perf/starfive,jh8100-starlink-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH8100 StarLink PMU
10 - Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
13 StarFive's JH8100 StarLink PMU integrates one or more CPU cores with a
14 shared L3 memory system. The PMU support overflow interrupt, up to
16 counter. StarFive's JH8100 StarLink PMU is accessed via MMIO.
20 const: starfive,jh8100-starlink-pmu
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| /linux/drivers/perf/ |
| H A D | starfive_starlink_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * StarFive's StarLink PMU driver
51 #define to_starlink_pmu(p) (container_of(p, struct starlink_pmu, pmu))
70 struct pmu pmu; member
87 return sysfs_emit(buf, "%s\n", (char *)eattr->var); in starlink_pmu_sysfs_format_show()
91 STARLINK_FORMAT_ATTR(event, "config:0-31"),
108 return sysfs_emit(buf, "event=0x%02llx\n", eattr->id); in starlink_pmu_sysfs_event_show()
134 return cpumap_print_to_pagebuf(true, buf, &starlink_pmu->cpumask); in cpumask_show()
157 struct starlink_pmu *starlink_pmu = to_starlink_pmu(event->pmu); in starlink_pmu_set_event_period()
158 struct hw_perf_event *hwc = &event->hw; in starlink_pmu_set_event_period()
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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