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Searched +full:j721e +full:- +full:pcie +full:- +full:host (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/pci/controller/cadence/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 menu "Cadence-based PCIe controllers"
25 bool "Cadence platform PCIe controller (host mode)"
30 Say Y here if you want to support the Cadence PCIe platform controller in
31 host mode. This PCIe controller may be embedded into many different
35 bool "Cadence platform PCIe controller (endpoint mode)"
41 Say Y here if you want to support the Cadence PCIe platform controller in
42 endpoint mode. This PCIe controller may be embedded into many
46 tristate "Sophgo SG2042 PCIe controller (host mode)"
50 Say Y here if you want to support the Sophgo SG2042 PCIe platform
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H A Dpci-j721e.c1 // SPDX-License-Identifier: GPL-2.0
3 * pci-j721e - PCIe controller driver for TI's J721E SoCs
5 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
10 #include <linux/clk-provider.h>
26 #include "pcie-cadence.h"
28 #define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie)
83 static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset) in j721e_pcie_user_readl() argument
85 return readl(pcie->user_cfg_base + offset); in j721e_pcie_user_readl()
88 static inline void j721e_pcie_user_writel(struct j721e_pcie *pcie, u32 offset, in j721e_pcie_user_writel() argument
91 writel(value, pcie->user_cfg_base + offset); in j721e_pcie_user_writel()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PCIE_CADENCE) += pcie-cadence.o
3 obj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o
4 obj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o
5 obj-$(CONFIG_PCIE_CADENCE_PLAT) += pcie-cadence-plat.o
6 obj-$(CONFIG_PCI_J721E) += pci-j721e.o
7 obj-$(CONFIG_PCIE_SG2042_HOST) += pcie-sg2042.o
/linux/drivers/phy/ti/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
34 PCIe.
37 tristate "TI J721E WIZ (SERDES Wrapper) support"
46 This option enables support for WIZ module present in TI's J721E
60 additional register to power on USB3 PHY/SATA PHY/PCIE PHY
105 in host mode, low speed.
/linux/drivers/usb/cdns3/
H A DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
34 Cadence USBSS-DEV driver.
40 bool "Cadence USB3 host controller"
44 Say Y here to enable host controller functionality of the
47 Host controller is compliant with XHCI so it will use
51 tristate "Cadence USB3 support on PCIe-based platforms"
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/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,j721s2-c71-dsp";
13 reg-names = "l2sram", "l1dram";
15 firmware-name = "j784s4-c71_3-fw";
17 ti,sci-dev-id = <40>;
18 ti,sci-proc-ids = <0x33 0xff>;
22 pcie2_rc: pcie@2920000 {
23 compatible = "ti,j784s4-pcie-host";
30 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
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H A Dk3-j721e-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e-som-p0.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
14 #include <dt-bindings/phy/phy-cadence.h>
17 compatible = "ti,j721e-evm", "ti,j721e";
18 model = "Texas Instruments J721e EVM";
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H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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