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/linux/drivers/irqchip/
H A Dirq-xilinx-intc.c48 static void xintc_write(struct xintc_irq_chip *irqc, int reg, u32 data) in xintc_write() argument
51 iowrite32be(data, irqc->base + reg); in xintc_write()
53 iowrite32(data, irqc->base + reg); in xintc_write()
56 static u32 xintc_read(struct xintc_irq_chip *irqc, int reg) in xintc_read() argument
59 return ioread32be(irqc->base + reg); in xintc_read()
61 return ioread32(irqc->base + reg); in xintc_read()
66 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_enable_or_unmask() local
76 xintc_write(irqc, IAR, mask); in intc_enable_or_unmask()
78 xintc_write(irqc, SIE, mask); in intc_enable_or_unmask()
83 struct xintc_irq_chip *irqc = irq_data_get_irq_chip_data(d); in intc_disable_or_mask() local
[all …]
H A Dirq-starfive-jh8100-intc.c35 static void starfive_intc_bit_set(struct starfive_irq_chip *irqc, in starfive_intc_bit_set() argument
40 value = ioread32(irqc->base + reg); in starfive_intc_bit_set()
42 iowrite32(value, irqc->base + reg); in starfive_intc_bit_set()
45 static void starfive_intc_bit_clear(struct starfive_irq_chip *irqc, in starfive_intc_bit_clear() argument
50 value = ioread32(irqc->base + reg); in starfive_intc_bit_clear()
52 iowrite32(value, irqc->base + reg); in starfive_intc_bit_clear()
57 struct starfive_irq_chip *irqc = irq_data_get_irq_chip_data(d); in starfive_intc_unmask() local
59 raw_spin_lock(&irqc->lock); in starfive_intc_unmask()
60 starfive_intc_bit_clear(irqc, STARFIVE_INTC_SRC0_MASK, BIT(d->hwirq)); in starfive_intc_unmask()
61 raw_spin_unlock(&irqc->lock); in starfive_intc_unmask()
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H A Dirq-apple-aic.c811 static int __init aic_init_smp(struct aic_irq_chip *irqc, struct device_node *node) in aic_init_smp() argument
936 struct aic_irq_chip *irqc; in aic_of_ic_init() local
944 irqc = kzalloc(sizeof(*irqc), GFP_KERNEL); in aic_of_ic_init()
945 if (!irqc) { in aic_of_ic_init()
950 irqc->base = regs; in aic_of_ic_init()
956 irqc->info = *(struct aic_info *)match->data; in aic_of_ic_init()
958 aic_irqc = irqc; in aic_of_ic_init()
960 switch (irqc->info.version) { in aic_of_ic_init()
964 info = aic_ic_read(irqc, AIC_INFO); in aic_of_ic_init()
965 irqc->nr_irq = FIELD_GET(AIC_INFO_NR_IRQ, info); in aic_of_ic_init()
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H A Dirq-lpc32xx.c196 struct lpc32xx_irq_chip *irqc; in lpc32xx_of_ic_init() local
201 irqc = kzalloc(sizeof(*irqc), GFP_KERNEL); in lpc32xx_of_ic_init()
202 if (!irqc) in lpc32xx_of_ic_init()
205 irqc->addr = addr; in lpc32xx_of_ic_init()
206 irqc->base = of_iomap(node, 0); in lpc32xx_of_ic_init()
207 if (!irqc->base) { in lpc32xx_of_ic_init()
209 kfree(irqc); in lpc32xx_of_ic_init()
213 irqc->domain = irq_domain_add_linear(node, NR_LPC32XX_IC_IRQS, in lpc32xx_of_ic_init()
214 &lpc32xx_irq_domain_ops, irqc); in lpc32xx_of_ic_init()
215 if (!irqc->domain) { in lpc32xx_of_ic_init()
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H A Dirq-renesas-rzg2l.c3 * Renesas RZ/G2L IRQC Driver
435 .name = "rzg2l-irqc",
452 .name = "rzfive-irqc",
482 * For TINT interrupts ie where pinctrl driver is child of irqc domain in rzg2l_irqc_alloc()
486 * in IRQC registers to enable a given gpio pin as interrupt. in rzg2l_irqc_alloc()
629 IRQCHIP_MATCH("renesas,rzg2l-irqc", rzg2l_irqc_init)
630 IRQCHIP_MATCH("renesas,r9a07g043f-irqc", rzfive_irqc_init)
633 MODULE_DESCRIPTION("Renesas RZ/G2L IRQC Driver");
H A Dirq-renesas-rza1.c3 * Renesas RZ/A1 IRQC Driver
226 priv->chip.name = "rza1-irqc"; in rza1_irqc_probe()
255 { .compatible = "renesas,rza1-irqc" },
282 MODULE_DESCRIPTION("Renesas RZ/A1 IRQC Driver");
H A Dirq-renesas-irqc.c3 * Renesas IRQC Driver
180 1, "irqc", handle_level_irq, in irqc_probe()
243 { .compatible = "renesas,irqc", },
271 MODULE_DESCRIPTION("Renesas IRQC Driver");
H A Dirq-ts4800.c150 { .compatible = "technologic,ts4800-irqc", },
159 .name = "ts4800-irqc",
H A DKconfig239 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
247 bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
254 bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,irqc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
16 - renesas,irqc-r8a73a4 # R-Mobile APE6
17 - renesas,irqc-r8a7742 # RZ/G1H
18 - renesas,irqc-r8a7743 # RZ/G1M
19 - renesas,irqc-r8a7744 # RZ/G1N
20 - renesas,irqc-r8a7745 # RZ/G1E
21 - renesas,irqc-r8a77470 # RZ/G1C
22 - renesas,irqc-r8a7790 # R-Car H2
23 - renesas,irqc-r8a7791 # R-Car M2-W
24 - renesas,irqc-r8a7792 # R-Car V2H
[all …]
H A Drenesas,rza1-irqc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rza1-irqc.yaml#
26 - renesas,r7s72100-irqc # RZ/A1H
27 - renesas,r7s9210-irqc # RZ/A2M
28 - const: renesas,rza1-irqc
64 irqc: interrupt-controller@fcfef800 {
65 compatible = "renesas,r7s72100-irqc", "renesas,rza1-irqc";
H A Drenesas,rzg2l-irqc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml#
27 - renesas,r9a07g043u-irqc # RZ/G2UL
28 - renesas,r9a07g044-irqc # RZ/G2{L,LC}
29 - renesas,r9a07g054-irqc # RZ/V2L
30 - renesas,r9a08g045-irqc # RZ/G3S
31 - const: renesas,rzg2l-irqc
33 - const: renesas,r9a07g043f-irqc # RZ/Five
37 include/dt-bindings/interrupt-controller/irqc-rzg2l.h and the second
188 - renesas,r9a08g045-irqc
209 irqc: interrupt-controller@110a0000 {
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H A Dtechnologic,ts4800.txt8 - compatible: should be "technologic,ts4800-irqc"
/linux/arch/arm/mach-shmobile/
H A Dregulator-quirk-rcar-gen2.c50 static void __iomem *irqc; variable
86 mon = ioread32(irqc + IRQC_MONITOR); in regulator_quirk_notify()
117 mon = ioread32(irqc + IRQC_MONITOR); in regulator_quirk_notify()
133 iounmap(irqc); in regulator_quirk_notify()
206 irqc = ioremap(IRQC_BASE, PAGE_SIZE); in rcar_gen2_regulator_quirk()
207 if (!irqc) { in rcar_gen2_regulator_quirk()
212 mon = ioread32(irqc + IRQC_MONITOR); in rcar_gen2_regulator_quirk()
226 iounmap(irqc); in rcar_gen2_regulator_quirk()
/linux/drivers/gpio/
H A Dgpio-vf610.c35 u8 irqc[VF610_GPIO_PER_PORT]; member
200 u8 irqc; in vf610_gpio_irq_set_type() local
204 irqc = PORT_INT_RISING_EDGE; in vf610_gpio_irq_set_type()
207 irqc = PORT_INT_FALLING_EDGE; in vf610_gpio_irq_set_type()
210 irqc = PORT_INT_EITHER_EDGE; in vf610_gpio_irq_set_type()
213 irqc = PORT_INT_LOGIC_ZERO; in vf610_gpio_irq_set_type()
216 irqc = PORT_INT_LOGIC_ONE; in vf610_gpio_irq_set_type()
222 port->irqc[d->hwirq] = irqc; in vf610_gpio_irq_set_type()
251 vf610_gpio_writel(port->irqc[gpio_num] << PORT_PCR_IRQC_OFFSET, in vf610_gpio_irq_unmask()
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043u.dtsi181 irqc: interrupt-controller@110a0000 { label
182 compatible = "renesas,r9a07g043u-irqc",
183 "renesas,rzg2l-irqc";
H A Dr9a08g045.dtsi219 interrupt-parent = <&irqc>;
228 irqc: interrupt-controller@11050000 { label
229 compatible = "renesas,r9a08g045-irqc", "renesas,rzg2l-irqc";
H A Drzg2ul-smarc-som.dtsi9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
81 interrupts-extended = <&irqc RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW>;
109 interrupts-extended = <&irqc RZG2L_IRQ7 IRQ_TYPE_LEVEL_LOW>;
H A Drzg2l-smarc-som.dtsi9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
105 interrupts-extended = <&irqc RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW>;
132 interrupts-extended = <&irqc RZG2L_IRQ3 IRQ_TYPE_LEVEL_LOW>;
H A Drzg2lc-smarc-som.dtsi9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
85 interrupts-extended = <&irqc RZG2L_IRQ0 IRQ_TYPE_LEVEL_LOW>;
/linux/arch/riscv/boot/dts/renesas/
H A Dr9a07g043f.dtsi57 irqc: interrupt-controller@110a0000 { label
58 compatible = "renesas,r9a07g043f-irqc";
/linux/drivers/char/
H A Dppdev.c76 atomic_t irqc; member
279 atomic_inc(&pp->irqc); in pp_irq()
615 ret = atomic_read(&pp->irqc); in pp_do_ioctl()
618 atomic_sub(ret, &pp->irqc); in pp_do_ioctl()
700 atomic_set(&pp->irqc, 0); in pp_open()
777 if (atomic_read(&pp->irqc)) in pp_poll()
/linux/include/dt-bindings/interrupt-controller/
H A Dirqc-rzg2l.h3 * This header provides constants for Renesas RZ/G2L family IRQC bindings.
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51-ts4800.dts170 fpga_irqc: fpga-irqc@15000 {
171 compatible = "technologic,ts4800-irqc";
/linux/arch/arm/boot/dts/renesas/
H A Dr7s9210.dtsi481 irqc: interrupt-controller@fcfef800 { label
482 compatible = "renesas,r7s9210-irqc",
483 "renesas,rza1-irqc";

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