| /freebsd/sys/i386/pci/ |
| H A D | pci_pir.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
52 * A link device. Loosely based on the ACPI PCI link device. This doesn't
67 int device; member
74 int device; member
82 static int pci_pir_biosroute(int bus, int device, int func, int pin,
83 int irq);
94 static uint8_t pci_pir_search_irq(int bus, int device, int pin);
95 static int pci_pir_valid_irq(struct pci_link *pci_link, int irq);
146 /* XXX - Use pmap_mapdev()? */ in pci_pir_open()
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| /freebsd/sys/compat/linuxkpi/common/src/ |
| H A D | linux_interrupt.c | 1 /*-
5 * Copyright (c) 2013-2015 Mellanox Technologies, Ltd.
30 #include <linux/device.h>
41 struct device *dev;
47 unsigned int irq; member
51 lkpi_irq_rid(struct device *dev, unsigned int irq) in lkpi_irq_rid() argument
53 /* check for MSI- or MSIX- interrupt */ in lkpi_irq_rid()
54 if (irq >= dev->irq_start && irq < dev->irq_end) in lkpi_irq_rid()
55 return (irq - dev->irq_start + 1); in lkpi_irq_rid()
61 lkpi_irq_ent(struct device *dev, unsigned int irq) in lkpi_irq_ent() argument
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| /freebsd/sys/compat/linuxkpi/common/include/linux/ |
| H A D | interrupt.h | 1 /*-
5 * Copyright (c) 2013-2015 Mellanox Technologies, Ltd.
33 #include <linux/device.h>
50 int lkpi_request_irq(struct device *, unsigned int, irq_handler_t,
56 void lkpi_devm_free_irq(struct device *, unsigned int, void *);
59 request_irq(unsigned int irq, irq_handler_t handler, unsigned long flags, in request_irq() argument
63 return (lkpi_request_irq(NULL, irq, handler, NULL, flags, name, arg)); in request_irq()
67 request_threaded_irq(int irq, irq_handler_t handler, in request_threaded_irq() argument
72 return (lkpi_request_irq(NULL, irq, handler, thread_handler, in request_threaded_irq()
77 devm_request_irq(struct device *dev, int irq, in devm_request_irq() argument
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| /freebsd/sys/contrib/device-tree/Bindings/iio/accel/ |
| H A D | lis302.txt | 3 This device is matched via its bus drivers, and has a number of properties
4 that apply in on the generic device (independent from the bus).
8 - compatible: should be set to "st,lis3lv02d-spi"
9 - reg: the chipselect index
10 - spi-max-frequency: maximal bus speed, should be set to 1000000 unless
12 - interrupts: the interrupt generated by the device
15 - compatible: should be set to "st,lis3lv02d"
16 - reg: i2c slave address
17 - Vdd-supply: The input supply for Vdd
18 - Vdd_IO-supply: The input supply for Vdd_IO
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| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | isil,isl12057.txt | 3 ISL12057 is a trivial I2C device (it has simple device tree bindings,
8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
12 to the SoC but to a PMIC. It allows the device to be powered up when
13 RTC alarm rings. In order to mark the device has a wakeup source and
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
16 can wake up the device.
18 Required properties supported by the device:
20 - "compatible": must be "isil,isl12057"
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| /freebsd/sys/dev/qat/qat_common/ |
| H A D | adf_isr.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
32 struct adf_accel_pci *info_pci_dev = &accel_dev->accel_pci_dev; in adf_enable_msix()
33 struct adf_hw_device_data *hw_data = accel_dev->hw_device; in adf_enable_msix()
40 if (hw_data->set_msix_rttable) in adf_enable_msix()
41 hw_data->set_msix_rttable(accel_dev); in adf_enable_msix()
43 /* If SR-IOV is disabled, add entries for each bank */ in adf_enable_msix()
44 if (!accel_dev->u1.pf.vf_info) { in adf_enable_msix()
45 msix_num_entries += hw_data->num_banks; in adf_enable_msix()
49 num_vectors = hw_data->num_banks + 1; in adf_enable_msix()
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| H A D | adf_vf_isr.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
59 struct adf_accel_dev *accel_dev = stop_data->accel_dev; in adf_dev_stop_async()
60 struct adf_hw_device_data *hw_data = accel_dev->hw_device; in adf_dev_stop_async()
66 /* Re-enable PF2VF interrupts */ in adf_dev_stop_async()
67 hw_data->enable_pf2vf_interrupt(accel_dev); in adf_dev_stop_async()
76 clear_bit(ADF_STATUS_PF_RUNNING, &accel_dev->status); in adf_pf2vf_handle_pf_restarting()
81 accel_dev->accel_id); in adf_pf2vf_handle_pf_restarting()
82 return -ENOMEM; in adf_pf2vf_handle_pf_restarting()
84 stop_data->accel_dev = accel_dev; in adf_pf2vf_handle_pf_restarting()
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| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | st,sti-irq-syscfg.txt | 2 -----------------------------------------------------------
9 - compatible : Should be "st,stih407-irq-syscfg"
10 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers
11 - st,irq-device : Array of IRQs to enable - should be 2 in length
12 - st,fiq-device : Array of FIQs to enable - should be 2 in length
15 - st,invert-ext : External IRQs can be inverted at will. This property inverts
23 irq-syscfg {
24 compatible = "st,stih407-irq-syscfg";
26 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
28 st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
|
| H A D | ti,keystone-irq.txt | 1 Keystone 2 IRQ controller IP
4 host using the IRQ controller IP. It provides 28 IRQ signals to ARM.
5 The IRQ handler running on HOST OS can identify DSP signal source by
10 - compatible: should be "ti,keystone-irq"
11 - ti,syscon-dev : phandle and offset pair. The phandle to syscon used to
12 access device control registers and the offset inside
13 device control registers range.
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
17 - interrupts: interrupt reference to primary interrupt controller
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| /freebsd/sys/contrib/device-tree/src/arm/intel/ixp/ |
| H A D | intel-ixp42x-ixdpg425.dts | 1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Intel IXDPG425 reference design.
5 * Ethernet set-up from OpenWrt.
7 * The device has 4 x FXS RJ11 ports for analog phones for
10 * The device has 9 status LEDs we do not support yet.
12 * This device is very similar to ADI engingeering Coyote.
15 /dts-v1/;
17 #include "intel-ixp42x.dtsi"
18 #include <dt-bindings/input/input.h>
23 #address-cells = <1>;
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| H A D | intel-ixp4xx-reference-design.dtsi | 1 // SPDX-License-Identifier: ISC
3 * Device Tree include file for Intel reference designs for the
4 * XScale Network Processors in the IXP 4xx series. Common device
5 * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465.
20 stdout-path = "uart0:115200n8";
28 compatible = "i2c-gpio";
29 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
30 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
31 #address-cells = <1>;
32 #size-cells = <0>;
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| H A D | intel-ixp42x-goramo-multilink.dts | 1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Goramo MultiLink Router
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
7 * This device tree supports MultiLink Basic.
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-binding
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| /freebsd/sys/dev/pci/ |
| H A D | pcib_if.m | 1 #-
71 # arguments determine the device which is being read and the reg
73 # device. The width argument (which should be 1, 2 or 4) specifies how
87 # arguments determine the device which is being written and the reg
89 # device. The value field is written to the configuration space, with
104 # a device's interrupt register.
113 # Allocate 'count' MSI messages mapped onto 'count' IRQs. 'irq' points
115 # device supports is included so that the MD code can take that into
139 # Allocate a single MSI-X message mapped onto '*irq'.
144 int *irq;
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| /freebsd/sys/dev/ena/ |
| H A D | ena.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
210 device_t pdev = adapter->pdev; in ena_dma_alloc()
215 maxsize = ((size - 1) / PAGE_SIZE + 1) * PAGE_SIZE; in ena_dma_alloc()
217 dma_space_addr = ENA_DMA_BIT_MASK(adapter->dma_width); in ena_dma_alloc()
232 &dma->tag); in ena_dma_alloc()
238 error = bus_dma_tag_set_domain(dma->tag, domain); in ena_dma_alloc()
245 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr, in ena_dma_alloc()
246 BUS_DMA_COHERENT | BUS_DMA_ZERO, &dma->map); in ena_dma_alloc()
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| /freebsd/sys/powerpc/powermac/ |
| H A D | cpcht.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (C) 2008-2010 Nathan Whitehorn
65 * IBM CPC9X5 Hypertransport Device interface.
85 int *irq);
87 int irq);
89 int irq, uint64_t *addr, uint32_t *data);
95 /* Device interface */
163 if (strcmp(compatible, "u3-ht") != 0) in cpcht_probe()
185 sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN; in cpcht_attach()
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| /freebsd/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-dsp-keystone.txt | 4 the DSP GPIO controller IP. It provides 28 IRQ signals per each DSP core.
8 - 8 for C66x CorePacx CPUs 0-7
11 - each GPIO can be configured only as output pin;
12 - setting GPIO value to 1 causes IRQ generation on target DSP core;
13 - reading pin value returns 0 - if IRQ was handled or 1 - IRQ is still
17 - compatible: should be "ti,keystone-dsp-gpio"
18 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
19 access device state control registers and the offset of device's specific
20 registers within device state control registers range.
21 - gpio-controller: Marks the device node as a gpio controller.
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | mmp-dma.txt | 7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
10 or one irq for pdma device
13 - dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-channels: deprecated
16 - dma-requests: Number of DMA requestor lines supported by the controller
18 - #dma-requests: deprecated
20 "marvell,pdma-1.0"
26 * Each channel has specific irq
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| /freebsd/sys/contrib/device-tree/Bindings/infiniband/ |
| H A D | hisilicon-hns-roce.txt | 10 - compatible: Should contain "hisilicon,hns-roce-v1".
11 - reg: Physical base address of the RoCE driver and
13 - eth-handle: phandle, specifies a reference to a node
14 representing a ethernet device.
15 - dsaf-handle: phandle, specifies a reference to a node
16 representing a dsaf device.
17 - node_guid: a number that uniquely identifies a device or component
18 - #address-cells: must be 2
19 - #size-cells: must be 2
21 - dma-coherent: Present if DMA operations are coherent.
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | max8925.txt | 3 Required parent device properties:
4 - compatible : "maxim,max8925"
5 - reg : the I2C slave address for the max8925 chip
6 - interrupts : IRQ line for the max8925 chip
7 - interrupt-controller: describes the max8925 as an interrupt
9 - #interrupt-cells : should be 1.
10 - The cell is the max8925 local IRQ number
12 Optional parent device properties:
13 - maxim,tsc-irq: there are 2 IRQ lines for max8925, one is indicated in
16 max8925 consists of a large and varied group of sub-devices:
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | smsc911x.txt | 1 * Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
4 - compatible : Should be "smsc,lan<model>", "smsc,lan9115"
5 - reg : Address and length of the io space for SMSC LAN
6 - interrupts : one or two interrupt specifiers
7 - The first interrupt is the SMSC LAN interrupt line
8 - The second interrupt (if present) is the PME (power
11 - phy-mode : See ethernet.txt file in the same directory
14 - reg-shift : Specify the quantity to shift the register offsets by
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
16 should be performed on the device. Valid value for SMSC LAN is
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| /freebsd/sys/arm/ti/ |
| H A D | ti_gpio.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * Beware that the OMAP4 datasheet(s) lists GPIO banks 1-6, whereas the code
32 * here uses 0-5.
154 #define TI_GPIO_LOCK(_sc) mtx_lock_spin(&(_sc)->sc_mtx)
155 #define TI_GPIO_UNLOCK(_sc) mtx_unlock_spin(&(_sc)->sc_mtx)
157 mtx_init(&_sc->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
159 #define TI_GPIO_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
160 #define TI_GPIO_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
161 #define TI_GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED)
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| /freebsd/sys/x86/x86/ |
| H A D | nexus.c | 1 /*-
86 static MALLOC_DEFINE(M_NEXUSDEV, "nexusdev", "Nexus device");
127 /* Device interface */
187 int irq; in nexus_init_resources() local
192 * - IRQ resource creation should be moved to the PIC/APIC driver. in nexus_init_resources()
193 * - DRQ resource creation should be moved to the DMAC driver. in nexus_init_resources()
194 * - The above should be sorted to probe earlier than any child buses. in nexus_init_resources()
196 * - Leave I/O and memory creation here, as child probes may need them. in nexus_init_resources()
201 * IRQ's are on the mainboard on old systems, but on the ISA part in nexus_init_resources()
202 * of PCI->ISA bridges. There would be multiple sets of IRQs on in nexus_init_resources()
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| /freebsd/sys/x86/include/ |
| H A D | intr_machdep.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 * Values used in determining the allocation of IRQ values among
37 * device interrupt source whether it be a pin on an interrupt
39 * IDT vectors, but all other device interrupts allocate IDT vectors
40 * on demand. Currently we have 191 IDT vectors available for device
42 * the IRQs are not used, so the total number of IRQ values reserved
45 * The first 16 IRQs (0 - 15) are reserved for ISA IRQs. Interrupt
46 * pins on I/O APICs for non-ISA interrupts use IRQ values starting at
47 * IRQ 17. This layout matches the GSI numbering used by ACPI so that
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| /freebsd/sys/contrib/device-tree/Bindings/net/wireless/ |
| H A D | marvell-8xxx.txt | 2 ------
4 This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
6 connects the device to the system.
10 - compatible : should be one of the following:
21 - marvell,caldata* : A series of properties with marvell,caldata prefix,
22 represent calibration data downloaded to the device during
23 initialization. This is an array of unsigned 8-bit values.
26 "marvell,caldata-txpwrlimit-2g" (length = 566).
27 "marvell,caldata-txpwrlimit-5g-sub0" (length = 502).
28 "marvell,caldata-txpwrlimit-5g-sub1" (length = 688).
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinctrl-mcp23s08.txt | 2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
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