| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | qcom,ipq4019-mdio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm IPQ40xx MDIO Controller
10 - Robert Marko <robert.marko@sartura.hr>
15 - enum:
16 - qcom,ipq4019-mdio
17 - qcom,ipq5018-mdio
19 - items:
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| /freebsd/sys/dev/qcom_mdio/ |
| H A D | qcom_mdio_ipq4018.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * This is the MDIO controller for the IPQ4018/IPQ4019.
69 if (ofw_bus_is_compatible(dev, "qcom,ipq4019-mdio") == 0) in qcom_mdio_ipq4018_probe()
73 "Qualcomm Atheros IPQ4018/IPQ4019 MDIO driver"); in qcom_mdio_ipq4018_probe()
82 if (sc->sc_mem_res != NULL) in qcom_mdio_ipq4018_detach()
83 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mem_rid, in qcom_mdio_ipq4018_detach()
84 sc->sc_mem_res); in qcom_mdio_ipq4018_detach()
85 mtx_destroy(&sc->sc_mtx); in qcom_mdio_ipq4018_detach()
93 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev); in qcom_mdio_sysctl_attach()
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| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-ipq4019.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controlle
596 mdio: mdio@90000 { global() label
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| H A D | qcom-ipq4018-jalapeno.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
17 function = "mdio";
27 bias-pull-up;
35 bias-disable;
43 drive-strength = <2>;
44 bias-disable;
50 drive-strength = <2>;
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| H A D | qcom-ipq4018-ap120c-ac.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
8 model = "ALFA Network AP120C-A
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | qcom,ipq4019-pinctrl.txt | 1 Qualcomm Atheros IPQ4019 TLMM block
7 - compatible: "qcom,ipq4019-pinctrl"
8 - reg: Should be the base address and length of the TLMM block.
9 - interrupts: Should be the parent IRQ of the TLMM block.
10 - interrupt-controller: Marks the device node as an interrupt controller.
11 - #interrupt-cells: Should be two.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells : Should be two.
16 - gpio-ranges: see ../gpio/gpio.txt
20 - gpio-reserved-ranges: see ../gpio/gpio.txt
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| /freebsd/sys/dts/arm/ |
| H A D | qcom-ipq4019-ethernet.dtsi | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
28 #include <dt-bindings/net/qcom-qca807x.h>
32 mdio: mdio@90000 { label
33 #address-cells = <1>;
34 #size-cells = <0>;
35 compatible = "qcom,ipq4019-mdio";
40 ess-switch@c000000 {
41 compatible = "qcom,ess-switch";
44 reset-names = "ess_rst";
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| H A D | qcom-ipq4018-rt-ac58u.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "qcom/qcom-ipq4019.dtsi"
4 #include "qcom-ipq4019-ethernet.dtsi"
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/soc/qcom,tcsr.h>
11 model = "ASUS RT-AC58U";
12 compatible = "asus,rt-ac58u";
20 led-boot = &led_power;
21 led-failsafe = &led_power;
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| /freebsd/sys/dev/etherswitch/ar40xx/ |
| H A D | ar40xx_main.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
53 #include <dev/mdio/mdio.h>
79 { "qcom,ess-switch", 1 },
90 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in ar40xx_probe()
103 callout_reset(&sc->sc_phy_callout, hz, ar40xx_tick, sc); in ar40xx_tick()
119 return MDIO_READREG(sc->sc_mdio_dev, phy, reg); in ar40xx_readphy()
127 return MDIO_WRITEREG(sc->sc_mdio_dev, phy, reg, val); in ar40xx_writephy()
141 memset(&sc->sc_vlan, 0, sizeof(sc->sc_vlan)); in ar40xx_reset_switch()
145 sc->sc_vlan.vlan_id[i] = 0; in ar40xx_reset_switch()
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| H A D | ar40xx_var.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 #define AR40XX_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
31 #define AR40XX_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
32 #define AR40XX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
38 bus_write_4(sc->sc_ess_mem_res, (reg), (val)); \
41 #define AR40XX_REG_READ(sc, reg) bus_read_4(sc->sc_ess_mem_res, (reg))
43 #define AR40XX_REG_BARRIER_WRITE(sc) bus_barrier((sc)->sc_ess_mem_res, \
44 0, (sc)->sc_ess_mem_size, BUS_SPACE_BARRIER_WRITE)
45 #define AR40XX_REG_BARRIER_READ(sc) bus_barrier((sc)->sc_ess_mem_res, \
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | ipq6018.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq601
306 mdio: mdio@90000 { global() label
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| H A D | ipq8074.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cell
269 mdio: mdio@90000 { global() label
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